Electro-optical device and electronic equipment

ABSTRACT

An active matrix driven electro-optical device, such as a liquid crystal device, is provided which is able to add sufficient storage capacitance to pixel electrodes and to decrease the diameter of contact holes connecting with pixel electrodes, even when a fine pixel pitch is employed. The liquid crystal device has TFTs, data lines, scanning lines, storage capacitor lines, and pixel electrodes provided on a TFT array substrate. Each of the pixel electrodes is electrically connected to one of the TFTs by two contact holes through a barrier layer. A part of a semiconductor layer and each of the capacitor lines sandwich a first dielectric film and constitute a first storage capacitor, while a part of the barrier layer and each of the capacitor lines sandwich a second dielectric film and constitute a second storage capacitor.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention belongs to the technical field of an active matrixdriven electro-optical device and a method for manufacturing the same,and more particularly, to an electro-optical device, which has storagecapacitor electrodes for adding storage capacitance to pixel electrodesand which also has a conductive layer designated as a barrier layer forallowing favorable electrical conductance between a pixel electrode anda pixel switching thin film transistor (hereunder sometimes referred toas an TFT).

2. Description of Related Art

In a conventional active matrix TFT-driven electro-optical device, manyscanning lines arranged along the columns of pixel electrodes, datalines arranged along the rows of pixel electrodes, and TFTs respectivelycorresponding to and disposed at intersections of the scanning and datalines are provided on a TFT array substrate. Each of the TFTs has a gateelectrode connected to the scanning line, and also has a semiconductorlayer, whose source and drain regions are respectively connected to thedata line and the pixel electrode. Incidentally, especially, each of thepixel electrodes is connected to the drain region of the semiconductorlayer of a corresponding TFT through a contact hole bored in aninterlayer insulating film, because the pixel electrodes are provided onvarious kinds of layers of the TFTs and on the interlayer insulatingfilm for insulating the pixel electrodes from one another. Further, whena scanning signal is supplied to the gate electrode of the TFT throughthe scanning line, the TFT is turned on. Moreover, an image signalsupplied to the source region of the semiconductor layer through thedata line is fed to the pixel electrode through the source-drain path ofthe TFT. Such supply of the image signal is supplied to each of thepixel electrodes through a corresponding one of the TFTs only for anextremely short time. Thus, generally, a storage capacitor is formed ineach of the pixel electrodes in parallel with a liquid crystal capacitorso as to hold the voltage of an image signal, which is supplied throughthe TFT turned on for an extremely short time, for a time that is farlonger than the extremely short time. On the other hand, in this kind ofan electro-optical device, the source and drain regions and the channelregion, which is formed between the source and drain regions, of each ofthe pixel switching TFTs are constituted by the semiconductor layersformed on the TFT array substrate. The pixel electrodes need to beconnected to the drain regions of the semiconductor layers through alaminated structure containing wirings, such as the scanning lines, thestorage capacitor lines, and the data lines, and a plurality ofinterlayer insulating films for electrically insulating these wirings.Incidentally, especially, in the case of staggered type or coplanar typepolysilicon TFTs, each having a top gate structure in which a gateelectrode is provided on a semiconductor layer, the interlayer distancefrom the semiconductor layer of the laminated structure to the pixelelectrode is long, for example, about 1000 nm or more. It is, thus,difficult to form a contact hole for electrically connecting both thesemiconductor layer and the pixel electrode. More specifically, it isextremely difficult to form such a deep hole only by dry etching,because of etching accuracy degradation that is caused by increasing thedepth of a portion, on which the etching is performed, and that resultsin possibility of penetrating a target semiconductor layer to therebyform a hole. Thus, a combination of dry etching and wet etching isperformed. However, this wet etching results in an increase in thediameter of the contact hole. Consequently, it is difficult to lay outnecessary amounts of wires and electrodes in a limited region on thesubstrate.

Hence, recently, the following technique has been developed. That is,when the electrical connection between the data line and the sourceregion is provided by making a contact hole, which is led to the sourceregion of the semiconductor layer, in the interlayer insulating filmformed on the scanning line, a relaying conductive layer designated as abarrier layer is formed from the same layer as that constituting thedata line on the interlayer insulating film by forming a contact holeled to the drain region of the semiconductor layer. Then, a contact holeguided to this barrier layer from the pixel electrode is formed in theinterlayer insulating film formed on the data line and this barrierlayer. Such a configuration, in which the electrical connection from thepixel electrode to the drain region is provided via the barrier layerconstituted by the same layer as that of constituting the data line, acontact hole forming step is facilitated, as compared with the case offorming a contact hole in such a way as to be led from the pixelelectrode directly to the semiconductor layer. Moreover, the diameter ofthe contact hole led to the drain region via the barrier layer issmaller than that of the contact hole led directly to the semiconductorlayer.

SUMMARY OF THE INVENTION

In the case of such a conventional electro-optical device, there is akeen ordinary demand for enhancing the picture quality of a displayedimage. It is extremely important in meeting such a demand to realize ahighly fine image display region or a fine pixel pitch, and to attain ahigh pixel aperture ratio (that is, to enhance the ratio of a pixelaperture region, which transmits display light, to a non-pixel-apertureregion, which does not transmit display light, corresponding to eachpixel).

However, this kind of conventional electro-optical device has a drawbackin that the pixel aperture ratio is low at a highly fine pixel pitchbecause there is an essential limit to the degree of fineness of each ofthe electrode size, wire width, and contact-hole diameter, which resultsfrom fabrication techniques, and that thus, the proportion of the areaof a region which contains such wires and electrodes relative to thearea of the image display region increases.

Furthermore, when the degree of fineness of the pixel pitch is enhancedin this manner, it is difficult to realize the aforementioned storagecapacitor which has sufficient storage capacitance and is incorporatedinto the limited region on the substrate. Incidentally, particularly,according to the aforementioned technique using the barrier layer, thebarrier layer is constituted by conductive film, such as Al (aluminum)film, which is the same as the conductive film constituting the dataline. Thus, the degree of flexibility of forming a contact hole is lowowing to the position and material of the barrier layer. Moreover, it isextremely difficult to use the barrier layer for purposes other thanthat of performing the relaying function. Particularly, it is impossibleto simplify the configuration of the device and to enhance efficiency ofa manufacturing process by making the most of each of the layers of thefine laminated structure. Additionally, according to this technique, achemical reaction is caused by bringing the Al film constituting thebarrier layer in contact with an ITO (Indium Tin Oxide) filmconstituting the pixel electrode. As a result, the readily ionizable Alfilm is subject to corrosion. This impairs the electrical connectionbetween the barrier layer and the pixel electrode. Thus, it is necessaryto use a high melting point metallic film, for instance, Ti (titanium)film, as a second barrier layer, so as to provide the favorableelectrical connection between the ITO film and the second barrier layer.Consequently, this conventional electro-optical device has a drawback inthat the structure of the layers and the process of fabricating thelayers are complexed.

The present invention is accomplished in view of the aforementioneddrawbacks. A problem to be solved by the present invention is to providean electro-optical device, which can favorably electrically relaybetween the pixel electrode and the thin film transistor and increasethe storage capacitance by using a relatively simple configuration evenwhen a fine pixel pitch is employed, and which also can display ahigh-picture-quality image, and to provide a method for manufacturingthe electro-optical device.

To solve the aforementioned problems, according to the presentinvention, there is provided a first electro-optical device, which mayconsist of a substrate that has a plurality of scanning lines, aplurality of data lines, thin film transistors connected to theplurality of scanning lines and the plurality of data lines, and pixelelectrodes and storage capacitors connected to the thin filmtransistors.

This first electro-optical device may further consist of a firstinterlayer insulating film formed above an electrode corresponding toone of the plurality of scanning lines and the plurality of storagecapacitors, a conductive layer formed above the first interlayerinsulating film, and a second interlayer insulating film formed abovethe conductive layer. The plurality of data lines are formed on thesecond interlayer insulating film.

According to the first electro-optical device of the present invention,electrodes of one of a group of scanning lines and a group of storagecapacitors, a first interlayer insulating film, a conductive layer, asecond interlayer insulating film, and data lines are formed on thesubstrate in this order. Therefore, the electrically conductive layerinterposed between the scanning line and the data line can be utilizedfor various purposes. The semiconductor layer and the pixel electrodecan be electrically connected through the conductive layer to each otherby connecting, for instance, first, the conductive layer and thesemiconductor layer through the first contact hole, and moreover,connecting the conductive layer and the pixel electrode through thesecond contact hole. Alternatively, storage capacitance can be impartedto the pixel electrodes by using a part of the conductive layer as astorage capacitor electrode facing a part of the semiconductor layer andthe other of the storage capacitor electrodes through the dielectricfilm. Alternatively, at least a part of the opened region of the pixelcan be defined with a conductive layer by forming the conductive layerfrom a light shielding film. Additionally, the data lines, the scanninglines, and other wirings other than the storage capacitor lines for oneof the storage capacitor electrodes can be constituted by conductivelayers. Further, the redundant wires of the data lines, the scanninglines, and the storage capacitor lines can be formed from conductivelayers.

According to an embodiment of the first electro-optical device of thepresent invention, the substrate is further provided with a thirdinterlayer insulating film formed on the data lines. The pixelelectrodes are formed on the third interlayer insulating film andelectrically connected to the conductive layer through the contact holesformed in the second and third insulating films. The conductive layer iselectrically connected to the semiconductor layer.

In such a configuration, the pixel electrodes are formed on the datalines via the third interlayer insulating film. The pixel electrodes areelectrically connected to the conductive layer through the contact holesformed in the second and third insulating films. The conductive layer isconnected to the semiconductor layer. Thus, there is provided theconfiguration, in which the semiconductor layer and the pixel electrodesare electrically connected to one another through the conductive layer.

To achieve the foregoing object, there is provided a secondelectro-optical device, which may consist of a substrate that has aplurality of scanning lines, a plurality of data lines, thin filmtransistors connected to the plurality of scanning lines and theplurality of data lines, pixel electrodes connected to the thin filmtransistors, semiconductor layers constituting of source regions, drainregions and first storage capacitor electrodes of the thin filmtransistors, an insulating thin film formed on each of the semiconductorlayers, a gate electrode of each of the thin film transistors, which isformed on the insulating thin film and constituted by a part of thescanning lines, a second storage capacitor electrode of each of thestorage capacitors formed on the insulating thin film, a firstinterlayer insulating film formed on the scanning lines and the secondstorage capacitor electrodes, a conductive layer formed on the firstinterlayer insulating film, and a second interlayer insulating filmformed on the conductive layer. The data lines are formed on the secondinterlayer insulating film and electrically connected to the sourceregion of the semiconductor layer through contact holes formed in thefirst and second interlayer insulating films.

According to the second electro-optical device of the present invention,the scanning lines, the second storage capacitor electrodes, the firstinterlayer insulating film, the conductive layer, the second interlayerinsulating film, and the data lines are formed on the substrate in thisorder. The pixel electrodes are formed further above. Further, the datalines are electrically connected to the source region of thesemiconductor layer through the contact holes formed in the first andsecond interlayer insulating films. In addition, the source and drainregions thereof are constituted by a part of the semiconductor layer.The gate insulating film of the thin film transistor is constituted by apart of the insulating film. Moreover, the gate electrode of the thinfilm transistor, which is formed from a part of the scanning lines, isformed on the insulating thin film. On the other hand, the first storagecapacitor electrode is formed from a part of the semiconductor layer. Adielectric film of the storage capacitor is formed from a part of theinsulating thin film. Furthermore, the second storage capacitorelectrode constituted by a part of the storage capacitor lines is formedon the insulating film. Thus, the thin film transistors are disposedunder the scanning lines. In parallel with this, the storage capacitorsare placed under the second storage capacitor electrode. Therefore, witha configuration in which such storage capacitors and the thin filmtransistors are placed side by side, the conductive layer between thescanning lines and the data lines can be utilized for various purposes.For example, first, a part of the conductive layer is used as a thirdstorage capacitor electrode facing the second storage capacitorelectrode through the first interlayer insulating film. Namely, thefirst interlayer insulating film is used at this place as a dielectricfilm of the storage capacitor, so that the a part of the conductivelayer and the second storage capacitor electrode are disposed in such amanner as to be opposed to each other. Thus, additional storagecapacitance can be added to the pixel electrodes (in addition to storagecapacitor obtained from the first and second storage capacitorelectrodes). Alternatively, similarly as in the case of theaforementioned first electro-optical device of the present invention,the semiconductor layer can be electrically connected to the pixelelectrodes through the conductive layer. Alternatively, at least a partof the opened region of the pixel can be defined with a conductivelayer. Moreover, the data lines, the scanning lines, and other wiringsother than the storage capacitor lines for one of the storage capacitorelectrodes can be constituted by conductive layers. Further, theredundant wires of the data lines, the scanning lines, and the storagecapacitor lines can be formed from conductive layers.

According to an embodiment of the second electro-optical device of thepresent invention, the conductive layer is electrically connected to thedrain region of the semiconductor layer through the contact holes formedin the first interlayer insulating film and the insulating thin film.

In such a configuration, the data lines are electrically connected tothe source region of the semiconductor layer through the contact holesformed in the insulating thin film and the first and second interlayerinsulating films. The conductive layer is electrically connected to thedrain region of the semiconductor layer through the contact holes formedin the first interlayer insulating film and the insulating thin film.Thus, the conductive layer can easily be used as the storage capacitorelectrode connected to the pixel electrode. Simultaneously, the pixelelectrodes and the drain region of the semiconductor layer can be easilyand electrically connected to each other through the conductive layer.

According to another embodiment of the second electro-optical device ofthe present invention, the substrate may further consist of the thirdinterlayer insulating film formed on the data lines. Moreover, the pixelelectrodes are formed on the third interlayer insulating film, andelectrically connected to the conductive layer through contact holesformed in the second and third interlayer insulating films.

In such a configuration, the pixel electrodes are formed above the datalines through the third interlayer insulating film. The pixel electrodesare electrically connected to the conductive layers via the contactholes formed in the second and third insulating films. Thus, the pixelelectrodes and the drain region can be easily and electrically connectedto each other through the conductive layer.

To achieve the foregoing object, according to the present invention,there is provided a third electro-optical device, which may consist of aplurality of pixel electrodes and a plurality of thin film transistors,which are arranged in a matrix on a substrate, scanning lines and datalines, connected to the thin film transistors via the interlayerinsulating films and three-dimensionally intersecting with one another,a conductive layer, which is interposed between the semiconductor layerof the thin film transistor and the pixel electrode and electricallyconnected to the drain region of the semiconductor layer through a firstcontact hole and electrically connected to said pixel electrode througha second contact hole, a first dielectric film interposed between afirst storage capacitor electrode, which is constituted by the same filmas a film of a semiconductor portion constituting the drain region, anda second storage capacitor electrode disposed on said first storagecapacitor electrode, and a second dielectric film interposed between thesecond storage capacitor electrode and a third storage capacitorelectrode, which is constituted by a part of the conductive layers.

According to the third electro-optical device of the present invention,in the substrate, the plurality of scanning lines and the plurality ofdata lines three-dimensionally intersect with one another via theinterlayer insulating film. The second storage capacitor electrodes foradding the storage capacitor to the plurality of pixel electrodes areprovided therein separately therefrom. Further, the conductive layer isinterposed between the semiconductor layer and the pixel electrode. Onone hand, the conductive layer is electrically connected to the drainregion of the semiconductor layer through the first contact hole. On theother hand, the conductive layer is electrically connected to the pixelelectrode through the second contact hole. Thus, as compared with thecase that only one contact hole is formed between the pixel electrodeand the drain region, the diameter of contact holes can be reduced to asmall value. That is, the deeper the formed contact hole, the lower theetching accuracy. Therefore, to prevent the contact hole frompenetrating the thin semiconductor layer, the process of forming thehole has to be adapted so that a dry etching operation, by which thediameter of the hole can be decreased, is stopped halfway, and thatfinally, a wet etching operation is performed until the hole reaches thesemiconductor layer. Therefore, the diameter of the contact holes has tobe increased as a result of performing the non-directional wet etchingoperation. In contrast, according to the present invention, it issufficient to connect the pixel electrode and the drain region of thesemiconductor layer by the two series-connected first and second contactholes. Thus, the contact holes can be formed by dry etching.Alternatively, at least the length of a part of each of these holeswhich is dug by wet etching can be decreased. Consequently, the diameterof each of the holes can be reduced to a small value. Thus, dents anduneven portions formed in the surface portion of the conductive layerare small in the first contact hole. This expedites enhancement of theflatness of this pixel electrode portions. Furthermore, dents and unevenportions formed in the surface portion of the conductive layer are smallin the second contact hole. This expedites enhancement of the flatnessof this pixel electrode portions. As a result, this reduces poorconditions, such as disclination of electro-optical materials, such asliquid crystals, owing to dents and uneven portions formed in thesurface parts of the pixel electrodes.

Furthermore, the first dielectric film is interposed between the firststorage capacitor electrode constituted by a semiconductor layer portionconstituting the drain region of the semiconductor layer, and the secondstorage capacitor electrode placed on the first storage capacitorelectrode. These three elements allow the capacitance of the firststorage capacitor electrode to be imparted to the pixel electrode thatis connected to the drain region of the semiconductor layer. Inaddition, the second dielectric film is interposed between the secondstorage capacitor electrode and the third storage capacitor electrodeconstituted by a part of the conductive layer. Hence, these threeelements allow the capacitance of the second storage capacitor electrodeto be imparted to the pixel electrode. Consequently, the first andsecond storage capacitors are formed above and under the conductivelayer in such a way as to be in parallel with one another. In thismanner, the three-dimensional arrangement of the storage capacitors isrealized in a limited region of the substrate. Incidentally, note thateach of the first and second dielectric films is constituted by adielectric film or layer that differs from the second interlayerinsulating film between the scanning lines and the data lines, whichthree-dimensionally intersect with one another. Thus, the thickness ofthe first and second dielectric films can be reduced to a technicallimit, regardless of the thickness of the second interlayer insulatingfilm required to have a certain thickness so as to suppress parasiticcapacitance between the scanning lines and the data lines, which wouldresult in occurrence of flicker and cause a voltage drop of an imagesignal. Assuming that the barrier layer is used as one of the storagecapacitor electrodes and the interlayer insulating film between the datalines and the scanning lines is used as the dielectric film in theaforementioned prior art device, in which this barrier layer(corresponding to the conductive layer of the present invention) isformed from the same conductive layer as constituting the data lines,this dielectric film should have a thickness of about 800 nm so as toeliminate the influence of the parasitic capacitance between the datalines and the scanning lines. Thus, it is essentially difficult toconstruct the storage capacitor of large capacitance by using thebarrier layer. In contrast with this, the present invention canextremely efficiently increase the capacitance of the storagecapacitors, which is inversely proportional to the thickness of adielectric film, by using the dielectric film which can be formed insuch a way as to have a small thickness.

Furthermore, according to the present invention, the diameter of thefirst contact hole can be decreased still more by forming the dielectricfilm in such a manner as to be small in thickness. The depth of thedents and the degree of the flatness of the uneven parts formed on theconductive layer can be reduced to a smaller value in the aforementionedfirst contact hole. This expedites the increase in the degree of theflatness of the surfaces of the pixel electrodes disposed above theconductive layer. Consequently, the poor conditions of theelectro-optical material which are due to the dents and the unevenpotions formed in the pixel electrodes are alleviated. Finally, thisrealizes an image display whose picture quality is enhanced still more.

Incidentally, in the case that the conductive layer and the seconddielectric film are formed by attaching importance to the lightshielding function of the conductive layer and the layout of the contactholes in place of or in addition to the storage capacitor addingfunction in this device of the present invention in such a way as toreach the scanning lines, it is sufficient to form the second dielectricfilm in such a manner as to be thick to the extent that the parasiticcapacitance between the conductive layer and the scanning line isnegligible. Therefore, in such a case, it is difficult to increase thecapacitance of the storage capacitors when the thickness of the seconddielectric film is reduced to the technical limit as described above.However, when sufficient storage capacitor is added to the device inview of the specifications of the device, there is no necessity forreducing the thickness of the second dielectric film further. It isadvantageous for the entire electro-optical device to be constructed insuch a manner as to expedite enhancement of the additional functions,such as the light shielding function of the conductive layer. In short,in view of the practical individual specifications of the device, it issufficient to set the planar layout of the conductive layer and thethickness of the second dielectric layer so that the conductive layerfully achieve the essential functions, such as the relaying function andthe function of adding the necessary storage capacitance, and theadditional functions, such as the light shielding function.

According to an embodiment of the third electro-optical device of thepresent invention, the first and second storage capacitor electrodes atleast partly overlap with each other through the first dielectric filmin a planar view. Further, the second and third storage capacitorelectrodes at least partly overlap with each other through the seconddielectric film in a planar view.

With such a configuration, the first and third storage capacitorelectrodes are respectively formed above and under the second storagecapacitor electrode. Thus, the three-dimensional arrangement of thestorage capacitor electrodes is realized on such a limited region of thesubstrate.

According to an embodiment of the third electro-optical device of thepresent invention, the first dielectric film and the insulating thinfilm are constituted by the same film. Further, the scanning lines andthe second storage capacitor electrode are constituted by the same film.Moreover, the second interlayer insulating film is formed on thescanning lines and the conductive layer.

With this configuration, the first dielectric film and the insulatingfilm of the thin film transistor are constituted by the same film, sothat these insulating films can be formed in the same process. Thescanning lines and the second storage capacitor electrode areconstituted by the same film, so that these conductive films can beformed in the same process. Further, the second interlayer insulatingfilm is formed on the scanning lines and the conductive layer. Moreover,the data lines are formed thereon. Therefore, the storage capacitancecan be increased by forming the first and second dielectric films insuch a manner as to have a small thickness. Simultaneously with this,the parasitic capacitance between the scanning lines and the data linescan be decreased by forming the second interlayer insulating film insuch a way as to be relatively large in thickness. Consequently, ahigh-picture quality image display can be realized by using such arelatively simple configuration.

According to another embodiment of the third electro-optical device ofthe present invention, the first and second interlayer insulating filmsare constituted by the same film.

With this configuration, the first and second interlayer insulatingfilms can be formed in the same process. It is advantageous to thedevice in that the number of steps of the manufacturing process is notincreased.

According to another embodiment of the first, second or thirdelectro-optical device of the present invention, the conductive layer isconstituted by a conductive light shielding film.

With this configuration, the aperture region of each of the pixels canbe defined at least partly by the conductive layer that is constitutedby the conductive light shielding film. Such a configuration, in which apart of or all of a built-in light shielding film (that is, a conductivelayer constituted by a light shielding film) is provided on thesubstrate (normally TFT array substrate) in place of a light shieldingfilm formed on the other substrate (usually, the opposing substrate), isextremely advantageous in that the positional deviation between asubstrate and an opposing substrate in the manufacturing process doesnot deteriorate the pixel aperture ratio.

In the case of this embodiment, in which the conductive layer isconstituted by the light shielding film, it is preferable that theconductive layer be formed so that the projections of the conductivelayer on the substrate extends between adjoining data lines along thescanning lines and in an island corresponding to each of the pixelelectrodes.

With this configuration, in which the conductive layer is formed inisland, the influence of stress of the film constituting the conductivelayer can be reduced. Moreover, part or all of a side which extendsalong the scanning lines of the pixel aperture region can be defined bythe conductive layer. Especially, in the case that the influence of theparasitic capacitance between the scanning line and the conductive layercannot be neglected from the viewpoint of the practical design of thecircuit of the device, it is preferable that the side which extendsalong the scanning lines of the pixel aperture region at the side, atwhich the storage capacitor lines adjoin the pixel electrodes, isdefined by the conductive layer without providing the conductive layeron the scanning lines.

In the case of this embodiment, in which the island-like light shieldingfilm is provided as the conductive layer, the adjoining data lines andthe conductive layer may be formed so that these lines and the layer atleast partly overlap with each other in a planar view.

With this configuration, there is no gap through which light penetratesbetween the end portion of the island-like conductive layer and the edgeof each of the data lines. That is, the edge portions of the data linescoincide with or slightly overlap with the end portion of the conductivelayer. Thus, this embodiment can prevent an occurrence of a poor-qualitydisplay, such as light leakage, in this portion.

In the case of this embodiment, in which the aforementioned conductivelayer is constituted by the light shielding film, the conductive layerand the scanning lines overlap with each other in a planar view.

With this configuration, the side, which extends along the scanninglines, of the pixel aperture region may be defined by the conductivelayer constituted by the light shielding film that is adapted to atleast partly cover both the groups of the scanning lines and the storagecapacitor lines.

In the case of the embodiment, in which the aforementioned conductivelayer is constituted by the light shielding film, the conductive layermay contain high-melting-point metal.

With this configuration, the conductive layer can be prevented frombeing broken or melted by a high temperature treatment to be performedafter the conductive layer constituted by the light shielding film isformed. For example, the light shielding film is constituted by ametallic simple substance, an alloy, or a metallic silicide, whichcontains at least one of Ti, Cr (chrome), W (tungsten), Ta (tantalum),Mo (molybdenum), and Pb (lead) that are opaque high-melting-pointmetals.

In the case of another embodiment of the first, second, or thirdelectro-optical device of the present invention, the conductive layer isconstituted by an electrically conductive polysilicon film.

With this configuration, the conductive layer constituted by theconductive polysilicon film can fully achieve the storage-capacitanceincreasing function and the relaying function, though this layer doesnot fully serve as a light shielding film. In this case, especially,stress due to heat or the like hardly occurs between this film and theinterlayer insulating film. Thus, this device is advantageous in thatthe generation of cracks in and around the conductive layer is avoided.

In the case of another embodiment of the first, second, or thirdelectro-optical device of the present invention, the conductive layer isconstituted by a laminated layer film consisting of two or more layersmade of conductive polysilicon film and high-melting-point metal.

With this configuration, the conductive layer constituted by theconductive polysilicon film can fully achieve the storage-capacitanceincreasing function and the relaying function, though this layer doesnot fully serve as the light shielding film. Further, when thesemiconductor layer is electrically connected to the conductivepolysilicon film, if the semiconductor layer is formed from the samepolysilicon film, the contact resistance can be considerably lowered.Moreover, if a high-melting-point metal layer is stacked on such aconductive polysilicon film, the conductive layer fully serves as thelight shielding film. Furthermore, the resistance thereof can belowered.

In the case of another embodiment of the first, second, or thirdelectro-optical device of the present invention, the substrate furtherhas a light shielding film provided in an area at which the lightshielding film covers the channel region of said semiconductor layer ina planar view.

With this configuration, the light shielding film provided at a sidewhich is nearer to the substrate than the thin film transistor that is,provided under the thin film transistor, can prevent return light fromentering the channel region and LDD (lightly doped drain) region of thethin film transistor, and can prevent the characteristics of the thinfilm transistor from being changed and deteriorated by the generation ofa photoelectric current. Moreover, all or part of the pixel apertureregion can be defined by this light shielding film.

In the case of the embodiment having this light shielding film, thelight shielding film may extend under the scanning lines and may beconnected to a constant potential source.

With this configuration, the characteristics of the thin film transistorprovided above the light shielding film via an underlying insulatingfilm are prevented from being changed and deteriorated due to variationin the electric potential of the light shielding film.

Alternatively, in the case of the embodiment including this fightshielding film, the light shielding film may be electrically connectedto the second storage capacitor electrode through a contact hole formedin an underlying insulating film interposed between the light shieldingfilm and the semiconductor layer.

With this configuration, the electric potential at the second storagecapacitor electrode can be made to be equal to that at the lightshielding film. If the electric potential at one of the second storagecapacitor electrode and the light shielding film is set at apredetermined value, the electric potential at the other of the secondstorage capacitor electrode and the light shielding film can be set atthe predetermined value. At that time, if the light shielding film is astorage capacitor line, the second storage capacitor electrode isconnected to the capacitor line, so that constant electric potential canbe applied to said second storage capacitor electrode. Consequently, thenegative influence of electric potential fluctuation at the secondstorage capacitor electrode and the light shielding film can be reduced.

According to another embodiment of the third electro-optical device ofthe present invention, the second storage capacitor electrode isextended and serves as the capacitor line.

With this configuration, the electric potential at the capacitor linecan be maintained at a constant level. Thus, the electric potential atthe second storage capacitor electrode can be stabilized. Further, atthat time, the capacitor lines and the scanning lines can be formed fromthe same film.

According to another embodiment of the third electro-optical device ofthe present invention, the capacitor line is electrically connected tothe light shielding film through the underlying insulating film.

With this configuration, the electric potential at the capacitor linescan be made to be equal to that at the light shielding film. If theelectric potential at one of the capacitor lines and the light shieldingfilm is set at a predetermined value, the electric potential at theother of the capacitor lines and the light shielding film can be set atthe predetermined value. Consequently, the negative influence ofelectric potential fluctuation at the capacitor lines and the lightshielding film can be reduced. Further, the wire constituted by thelight shielding film and the capacitor lines can be mutually made toserve as redundant wires.

According to another embodiment of the third electro-optical device ofthe present invention, the conductive layer and the light shielding filmmay be disposed so that the conductive layer at least partly overlapswith the light shielding film in a planar view.

With this configuration, the conductive layer and the light shieldingfilm are formed in such a way as to sandwich the channel region of thesemiconductor layer therebetween. Thus, light can be prevented fromentering the channel region from the substrate side thereof and theother side. Consequently, the characteristics of the thin filmtransistors can be prevented from being changed and deteriorated.Moreover, this can prevent an occurrence of a crosstalk, a reduction inthe contrast ratio, and deterioration in a flicker level.

According to another embodiment of the first, second, or thirdelectro-optical device of the present invention, the underlyinginsulating film is provided between the substrate and each of the thinfilm transistors. Moreover, the third interlayer insulating film isprovided on the data lines and under the pixel electrodes. At least oneof the substrate, the underlying insulating film, the second interlayerinsulating film, and the third interlayer insulating film is formed insuch a way as to be partly dented in at least one of regionsrespectively corresponding to the thin film transistors, the scanninglines, the data lines, and the storage capacitors. Thus, the foundationsurface of the pixel electrodes is formed in such a manner as to bealmost flat.

With this configuration, at least one of the substrate and a pluralityof interlayer insulating films is formed in such a way as to be partlydented in at least one of regions corresponding to the thin filmtransistors, the scanning lines, the data lines, and the storagecapacitors. Thus, the difference between regions, in which the thin filmtransistors, the scanning lines, and the storage capacitors are formedin such a way as to overlap with the data lines, and other regions canbe reduced. In this way, the bottom surfaces of the pixel electrodes aremade to be almost flat. Consequently, the degree of the flatness of thesurface of each of the pixel electrodes can be increased still more.Thus, this reduces poor conditions, such as disclination, ofelectro-optical materials, such as liquid crystals, owing to dents anduneven portions formed in the surface parts of the pixel electrodes.Finally, a high-picture-quality image display can be achieved.

According to another embodiment of the third electro-optical device ofthe present invention, the first contact hole and the second contacthole are formed at different places on the surface of the substrate.

Small dents and uneven portions are formed in the conductive layercorresponding to the place on the surface thereof, in which the firstcontact hole is formed. Thus, when the second contact hole is furtherformed just above this place, it is difficult to provide favorableelectrical connection therebetween. Therefore, if the positions on thesurface respectively corresponding to these holes are slightly differedfrom each other, it is expected that the favorable electric connectiontherebetween is provided.

According to another embodiment of the first, second, or thirdelectro-optical device of the present invention, the thickness of theconductive layer ranges from 50 nm to 500 nm.

With this configuration, there is almost or entirely no negative effect(for instance, poor alignment of the liquid crystals) due to thedifference in height between the surfaces of the pixel electrodes, whichis caused by the presence of the conductive layer, because the thicknessof the conductive layer ranges from 50 nm to 500 nm. Or else, thenegative influence of such difference therebetween can be eliminated byflattening or leveling the interlayer insulating film placed above theconductive layer. Further, various advantageous effects can be obtainedby alleviating the negative influence of the conductive layer.

According to another embodiment of the second electro-optical device ofthe present invention, the thickness of the first interlayer insulatingfilm ranges from 10 nm to 200 nm.

With this configuration, the first interlayer insulating film is formedas a relatively thin insulating film, because the thickness thereofranges from 10 nm to 200 nm. Therefore, if an additional storagecapacitor is constructed, as described above, by utilizing this firstinterlayer insulating film as the dielectric film so that the first andsecond storage capacitor electrodes and the conductive layer are placedin such a way as to be opposed to each other through the firstinterlayer insulating film, the storage capacitor having largecapacitance can be obtained according to the thickness thereof.

According to anther embodiment of the third electro-optical device ofthe present invention, the thickness of the second dielectric filmranges from 10 nm to 200 nm.

With this configuration, the second dielectric film is a relatively thininsulating film because the thickness of the second dielectric filmranges from 10 nm to 200 nm. Thus, the storage capacitor obtained byplacing the second and third storage capacitor electrodes in such amanner as to be opposed to each other through the second dielectric filmis large according to the thickness thereof.

According to an embodiment in which the conductive layer is constitutedby the light shielding film, the conductive layer may be formed in sucha fashion as to define at least a part of the pixel aperture region.

With this configuration, the pixel aperture region can be defined by theconductive layer singly, or together with the data lines and the lightshielding film formed on the other substrate. Especially, if theaperture region is defined without forming the light shielding film onthe other substrate, the number of steps of the manufacturing processcan be decreased. Moreover, a decrease or variation in the pixelaperture ratio, which would be caused by alignment deviation between apair of the substrates, can be prevented. This is advantageous for theelectro-optical device.

To achieve the foregoing object, according to the present invention,there is provided a method for manufacturing an electro-optical device,which has a plurality of scanning lines, a plurality of data lines, thinfilm transistors placed correspondingly to intersections between thescanning lines and the data lines, and pixel electrodes and storagecapacitors connected to the thin film transistors. This method mayconsist of the steps of forming a source region, a channel region, and adrain region of each of the thin film transistors, and a semiconductorlayer constituting a first storage capacitor electrode corresponding toone of the storage capacitors on a substrate, forming an insulating thinfilm on the semiconductor layer, forming the scanning lines and a secondstorage capacitor electrode of one of the storage capacitors on theinsulating thin film, forming a first interlayer insulating film on thesecond storage capacitor electrode, forming a first contact hole in thegate insulating film and the first interlayer insulating film, forming aconductive layer on the first interlayer insulating film so that theconductive layer is electrically connected to the semiconductor layerthrough the first contact hole, forming a second interlayer insulatingfilm on the conductive layer, forming the data lines on the secondinterlayer insulating film, forming a third interlayer insulating filmon the data lines, forming a second contact hole in the second and thirdinterlayer insulating films, and forming the pixel electrodes in such amanner as to be electrically connected to the conductive layer throughthe second contact hole.

According to the method for manufacturing an electro-optical device ofthe present invention, the electro-optical device can be manufactured byperforming a relatively simple process.

An embodiment of the method for manufacturing an electro-optical deviceof the present invention may further consist of the steps of: forming alight shielding film in a region facing the channel region of thesubstrate, and forming an underlying insulating film on the lightshielding film. In the step of forming the semiconductor layer, thesemiconductor layer is formed on the substrate insulating film.

With such constitution, an electro-optical device, in which the lightshielding film is provided under the thin film transistors, can bemanufactured by performing a process consisting of a relatively smallnumber of steps, each of which are relatively simply achieved.

An embodiment of the method for manufacturing an electro-optical deviceof the present invention may further consist of the step of making atleast one of the substrate, the underlying insulating film, the secondinterlayer insulating film, and the third interlayer insulating film tobe dented in a part of at least one of regions respectivelycorresponding to the thin film transistors, the scanning lines, the datalines, and the storage capacitors.

According to such an embodiment, the bottom surface of each of the pixelelectrodes can be flattened by forming making at least one of thesubstrate, the underlying insulating film, the second interlayerinsulating film, and the third interlayer insulating film to be dentedin a part of at least one of regions respectively corresponding to thethin film transistors, the scanning lines, the data lines, and thestorage capacitors. Thus, poor conditions, such as disclination, can bealleviated. Such effects and other advantages will become apparent fromthe following description of embodiments of the present invention.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a diagram illustrating an equivalent circuit containing avariety of elements provided in a plurality of pixels arranged in amatrix and wirings of an image display region in a liquid crystaldevice, in a first embodiment of an electro-optical device of thepresent invention;

FIG. 2 is a plan diagram illustrating the plurality of adjacent pixelsarranged on a TFT array substrate, on which data lines, scanning lines,pixel electrodes, and a light shielding film are formed, in the liquidcrystal device, in the first embodiment of the present invention;

FIG. 3 is a sectional view taken on line III-III′ of FIG. 2;

FIG. 4 is a diagram illustrating (Part 1 of) a manufacturing process ofthe liquid crystal device, in the first embodiment, step by step;

FIG. 5 is a diagram illustrating (Part 2 of) the manufacturing processof the liquid crystal device, in the first embodiment, step by step;

FIG. 6 is a diagram illustrating (Part 3 of) the manufacturing processof the liquid crystal device, in the first embodiment, step by step;

FIG. 7 is a diagram illustrating (Part 4 of) the manufacturing processof the liquid crystal device, in the first embodiment, step by step;

FIG. 8 is a plan diagram illustrating the plurality of adjacent pixelsarranged on a TFT array, on which data lines, scanning lines, pixelelectrodes, and a light shielding film are formed, in a liquid crystaldevice, in a second embodiment of the present invention;

FIG. 9 is a sectional view taken on line IX-IX′ of FIG. 8;

FIG. 10 is a sectional view of a liquid crystal device in a thirdembodiment of the electro-optical device;

FIG. 11 is a sectional view of a liquid crystal device in a fourthembodiment of the electro-optical device;

FIG. 12 is a sectional view of a liquid crystal device in a fifthembodiment of the electro-optical device;

FIG. 13 is a plan diagram illustrating the TFT array substrate andconstituent elements provided thereon, as viewed from an opposingsubstrate, in the liquid crystal device, in each of the embodiments;

FIG. 14 is a sectional view taken on line XIV-XIV′ of FIG. 12;

FIG. 15 is a block diagram schematically illustrating the configurationof an embodiment of electronic equipment of the present invention;

FIG. 16 is a sectional diagram illustrating a projector as an example ofthe electronic equipment; and

FIG. 17 is a front diagram illustrating a personal computer as anotherexample of the electronic equipment.

DETAILED DESCRIPTION OF THE EMBODIMENTS

Hereinafter, embodiments of the present invention will be described withreference to the accompanying drawings.

(First Embodiment of Electro-optical Device)

The configuration of a liquid crystal device in a first embodiment of anelectro-optical device of the present invention, will be described byreferring to FIGS. 1 to 3. FIG. 1 is a diagram illustrating anequivalent circuit of a circuit containing a variety of elements in aplurality of pixels arranged in a matrix-like manner and wirings of animage display region in the liquid crystal device. FIG. 2 is a plandiagram illustrating the plurality of adjacent pixels arranged on a TFTarray substrate, on which data lines, scanning lines, pixel electrodes,and a light shielding film are formed, in the liquid crystal device inthe first embodiment of the present invention. FIG. 3 is a sectionalview taken on line III-III′ of FIG. 2. Incidentally, in FIG. 3, a scalefactor is allowed to vary with layers and members so that such layersand members are recognizable in this figure.

As shown in FIG. 1, a plurality of TFTs 30 for controlling pixelelectrodes 9 a are formed in such a way as to be placed in a matrixrespectively corresponding to a plurality of pixels formed in such afashion as to be disposed in a matrix in an image display region of theliquid crystal device of this embodiment. Further, data lines 6 a,through which image signals are supplied, are electrically connected tothe sources of the TFTs 30. The pixel electrodes 9 a and the TFTs 30 aredisposed correspondingly to the intersections between scanning lines 3 aand the data lines 6 a. Image signals S1, S2, . . . , and Sn to bewritten may be supplied in a line sequential manner to the data lines 6a in this order. Alternatively, groups of such image signals may besupplied to the plurality of adjoining data lines 6 a group by group.Furthermore, the scanning lines 3 a are electrically connected to thegates of the TFTs 30. Scanning signals G1, G2, . . . , and Gm areapplied with predetermined timing as pulses to the scanning lines 3 a inthis order in a line sequential manner. The pixel electrodes 9 a areelectrically connected to the drains of the TFTs 30 and then used towrite the image signals S1, S2, . . . , and Sn supplied from the datalines 6 a to liquid crystals with predetermined timing by closing theTFTs 30 serving as switching devices, for a certain period. The imagesignals S1, S2, . . . , and Sn of predetermined levels being written tothe liquid crystals through the pixel electrodes 9 a are held for acertain period between opposing electrodes (to be described later)formed on an opposing substrate (to be described later). The alignmentand order parameter of liquid crystal molecules changes according to thelevel of a voltage to be applied thereto. This modulates light andallows gray-scale display. In a normally white mode, this liquid crystalportion is prevented from transmitting incident light according to thevoltage applied thereto. Conversely, in a normally black mode, thisliquid crystal portion is permitted to transmit the incident lightaccording to the voltage applied thereto. Thus, light representing adisplayed image having the contrast determined according to the imagesignals is outputted from the liquid crystal device as a whole.Incidentally, a storage capacitor 70 is added to the device in parallelwith a liquid capacitor formed between the pixel electrode 9 a and theopposing electrode so as to prevent the held image signals from leaking.The voltage applied to the pixel electrode 9 a is maintained by thestorage capacitor 70 for a time three digits longer than a time periodduring which a source voltage is applied thereto. This improves theholding characteristics of the device and realizes a liquid crystaldevice that achieves a high contrast display.

As shown in FIG. 2, a plurality of transparent pixel electrodes 9 a(whose contours are indicated by dotted lines 9 a′) are provided in amatrix on the TFT array substrate of the liquid crystal device.Moreover, the data lines 6 a, the scanning lines 3 a, and the storagecapacitor lines 3 b are provided along the lengthwise and breadthwiseboundaries of the pixel electrodes 9 a The data lines 6 a areelectrically connected through the contact hole 5 to the source regions(to be described later) of the semiconductor layer 1 a constituted by apolysilicon film or the like. The pixel electrodes 9 a are formed inregions hatched with oblique lines extending in the direction from thelower left comer to the upper right comer thereof in this figure.Further, the pixel electrodes 9 a are electrically connected to thedrain regions (to be described later) of the semiconductor layers 1 athrough the first contact holes 8 a and the second contact holes 8 b viathe conductive layers (hereinafter referred to as “barrier layers”) 80serving as buffers. Furthermore, the scanning lines 3 a are arranged insuch a manner as to face the channel regions 1 a′ (hatched with obliquelines extending in the direction from the upper left comer to the lowerright comer thereof in this figure) of the semiconductor layer 1 a. Thescanning lines 3 a serve as gate electrodes. In this way, the TFTs 30are provided at the intersections of the scanning lines 3 a and the datalines 6 a so that the scanning lines 3 a are disposed as the gateelectrodes in such a way as to face the channel regions 1 a.

The storage capacitor lines 3 b each have a main line portion extendingalong the scanning line 3 a almost linearly, and a protruded portionprotruding from an intersection of the data line 6 a and the protrudedportion to a front stage side (upwardly, as viewed in this figure) alongthe data line 6 a.

Further, first light shielding films 11 a are provided in the regionsindicated by thick lines in this figure, under the scanning lines 3 a,the storage capacitor lines 3 b, and the TFTs 30. More specifically, asshown in FIG. 2, the first light shielding films 11 a are formed instripes along the scanning lines 3 a. Moreover, a large-widthintersection part of each of the films 11 a which intersect with thedata lines 6 a is formed in a portion shown in a lower part of thisfigure. The films 11 a are disposed at places at which the large-widthparts cover the channel regions 1 a ′ when viewed from the TFT arraysubstrate side.

Next, as shown in the sectional diagram of FIG. 3, the liquid crystaldevice has a TFT array substrate 10 and an opposing substrate 20 that isan example of another transparent substrate to be placed in such amanner as to be opposed to the substrate 10. The TFT array substrate 10is constituted by, for instance, a quartz substrate. The opposingsubstrate 20 is constituted by, for example, a glass substrate or aquartz substrate. The pixel electrodes 9 a are provided on the TFT arraysubstrate 10. An alignment film 16 having undergone a predeterminedalignment treatment, such as a rubbing treatment, is provided on thepixel electrodes 9 a. The pixel electrodes 9 a are constituted by, forinstance, transparent conductive thin films, such as an ITO film.Further, the alignment film 16 is constituted by, for example, anorganic thin film, such as a polyimide thin film.

On the other hand, opposing electrodes 21 are provided on the entiresurface of the opposing substrate 20. An alignment film 22 havingundergone the predetermined alignment treatment, such as the rubbingtreatment, is provided under the opposing electrodes 21. The opposingelectrodes 21 are constituted by, for instance, a transparent conductivethin film, such as an ITO film. Further, the alignment film 22 isconstituted by, for example, an organic thin film, such as a polyimidethin film.

Pixel switching TFTs 30 for switching and controlling the pixelelectrodes 9 a are provided at places on the TFT array substrate 10which adjoin the pixel electrodes 9 a

Further, as illustrated in FIG. 3, a second light shielding film 23 maybe provided in a non-open region of each of the pixels on the opposingsubstrate 20. Thus, incident light does not enter the channel regions 1a′, the low concentration source region 1 b, and the low concentrationdrain region 1c of the semiconductor layer 1 a of each of the pixelswitching TFTs 30 from the side of the opposing substrate 20. Moreover,the second light shielding film 23 has the functions of improving thecontrast of a displayed image, and preventing an occurrence of a mixedcolor in the case of forming a color filter.

Liquid crystals, which are an example of the electro-optical material,is sealed in a space defined by the sealing material (to be describedlater) between TFT array substrate 10 and the opposing substrate 20constructed as described above and placed so that the pixel electrodes 9a face the opposing electrodes 21. Thus, a liquid crystal layer 50 isformed. The liquid crystal layer 50 takes a predetermined alignmentstate according to the alignment films 16 and 22 when no electric fieldis applied from the pixel electrodes 9 a thereto. The liquid crystallayer 50 consists of liquid crystals obtained by mixing one or morekinds of nematic liquid crystals. The sealing material is an adhesiveagent including, for instance, a photo-curing resin or a thermosettingresin, for bonding together the TFT array substrate 10 and the opposingsubstrate 20 in the peripheral portions thereof. Further, gap materials,such as glass fibers and glass beads, for adjusting the distance betweenthe substrates to a predetermined value are mixed into the sealingmaterial.

Further, as illustrated in FIG. 3, a first light shielding film 11 a isprovided at a position facing each of the pixel switching TFTs 30between the TFT array substrate 10 and each of the pixel switching TFTs30. Preferably, the first light shielding film 11 a is constituted by ametallic substance, an alloy, or a metallic silicide, which contains atleast one of Ti, Cr, W, Ta, Mo, and Pb, which are opaquehigh-melting-point metals. In the case that the first light shieldingfilm 11 a is constituted by such a material, the first light shieldingfilm 11 a can be prevented from being damaged and melted by a hightemperature treatment in the process of forming the pixel switching TFTs30 to be performed upon completion of the step of forming the firstlight shielding film 11 a on the TFT array substrate 10. As a result offorming such a light shielding film 11 a, reflected light (or returnlight) from the side of the TFT array substrate 10 is prevented fromentering the channel region 1 a′, the low concentration source region 1b, and the low concentration drain region 1 c of each of the pixelswitching TFTs 30, which are apt to be optically excited. Further, thecharacteristics of the pixel switching TFTs 30 are prevented from beingchanged and deteriorated owing to an occurrence of a photo-current dueto this excitation.

Furthermore, an underlying insulating film 12 is provided between thefirst light shielding film 11 a and each of the plurality of pixelswitching TFTs 30. The underlying insulating film 12 is provided forelectrically insulating the semiconductor layer 1 a of each of the pixelswitching TFTs 30 from the first light shielding film 11 a Furthermore,the underlying insulating film 12 is formed on the entire surface of theTFT array substrate 10 and serves as an underlying film or coat for thepixel switching TFTs 30. Namely, the film 12 has the function ofpreventing the characteristics of the pixel switching TFTs 30 from beingdeteriorated owing to the roughness caused at the time of polishing thesurface of the TFT array substrate 10 and the stain left thereon afterwashed. The underlying insulating film 12 is constituted by, forexample, highly insulative glass, such as NSG (non-doped silicateglass), PSG (phosphorus silicate glass), BSG (boron silicate glass),BPSG (boron-phosphosilicate glass), or silicon oxide film, or siliconnitride film. The underlying insulating film 12 can prevent the pixelswitching TFTs 30 from being stained by the first light shielding film11 a.

In this embodiment, the semiconductor layer 1 a is extended from a highconcentration drain region 1 e and used as the first storage capacitorelectrode 1 f. A part of the storage capacitor line 3 b opposing this isused as the second storage capacitor electrode. An insulating thin film2 is extended from a position opposite the scanning line 3 a, and isused as a first dielectric film sandwiched between these electrodes. Thefirst storage capacitor 70 a is constructed in this manner. Furthermore,a part of the barrier layer 80 facing the second storage capacitorelectrode is used as a third storage capacitor electrode. A firstinterlayer insulating film 81 is provided between these electrodes. Thefirst interlayer insulating film 81 also serves as a second dielectricfilm. The second storage capacitor 70 b is formed on the firstinterlayer insulating film 81. Further, the first storage capacitor 70 aand the second storage capacitor 70 b are connected in parallel theretothrough the first contact hole 8 a. The storage capacitor 70 isconstructed in this manner.

[START HERE] More particularly, the high concentration drain region 1 eof the semiconductor layer 1 a is extended under the data lines 6 a andthe scanning lines 3 a so that the pixel switching TFTs 30 are formed.Similarly, a first storage capacitor electrode 1 f is formed and placedin such a way as to face the capacitor line 3 b extending along the datalines 6 a and the scanning line 3 a through the first dielectric film 2.Especially, the first dielectric film 2 is an insulating thin film 2 ofthe TFT 30 formed on the polysilicon film by high-temperature oxidation.Thus, the film 2 can be formed in such a manner as to be as a thinhigh-withstand-voltage insulting film. The first storage capacitor 70 acan be formed as a storage capacitor having relatively largecapacitance, whose surface has a relatively small area. Furthermore, thesecond dielectric film 81 can be formed as a thin film, similarly as theinsulating thin film 2. Thus, as illustrated in FIG. 2, the secondstorage capacitor 70 b can be constructed as a storage capacitor whichhas a relatively small area and large capacitance, by utilizing a regionbetween the adjoining data lines 6 a. Therefore, the storage capacitor70 constructed three-dimensionally from the first storage capacitor 70 aand the second storage capacitor 70 b can be formed in such a manner asto have a small-area and large capacitance, by effectively utilizing aregion, in which disclination occurs in liquid crystals (namely, theregion where the capacitor line 3 b is formed) provided under the datalines 6 a and along the scanning lines 3 a, and utilizing a space whichis way off the pixel aperture region.

As shown in FIG. 3, each of the pixel switching TFTs 30 has an LDDstructure and includes the scanning lines 3 a, the channel region 1 a′in which a channel is formed by an electric field generated from thescanning lines 3 a of the semiconductor layer 1 a, the insulating thinfilm 2 for insulating the scanning lines 3 a and the semiconductor layer1 a, the data lines 6 a, the low concentration source region 1 b, andthe low concentration drain region 1 c, the high concentration sourceregion 1 d, and the high concentration drain region 1 e of thesemiconductor layer 1 a. Further, the high concentration drain region 1e is connected to a corresponding one of the plurality of pixelelectrodes 9 a via the barrier layer 80. The low concentration sourceregion 1 b, the high concentration source region 1 d, the lowconcentration drain region 1 c, and the high concentration drain region1 e are formed by doping n-type or p-type impurities havingpredetermined concentrations into the semiconductor layer 1 a accordingto whether an n-channel or p-channel is formed. N-channel TFTs areadvantageous in that the operating speed thereof is high, and thus oftenused as the pixel switching TFTs 30, which are switching elements forswitching the pixels. In this embodiment, especially, each of the datalines 6 a is constituted by a light-shielding conductive thin film, forinstance, a low-resistance metal film, such as an Al film, or a metalalloy, such as a metallic silicide. Moreover, a contact hole 5 guided tothe high concentration source region 1 d, and the contact hole 8 bguided to the barrier layer 80 are formed above the barrier layer 80 andthe second dielectric film (namely, the first interlayer insulatingfilm) 81. The data line 6 a is electrically connected to the highconcentration source region 1 d through the contact hole 5 guided tothis high concentration source region 1 d. Further, a third interlayerinsulating film 7 having the contact hole 8 b formed in such a manner asto be guided to the barrier layer 80 is formed on the data lines 6 a anda second interlayer insulating film 4. The pixel electrodes 9 aelectrically connected to the barrier layer 80 are also electricallyconnected to the high concentration drain region 1 e through the contacthole 8 a via the barrier layer 80. The aforementioned pixel electrodes 9a are provided on the top surface of the third interlayer insulatingfilm 7 constructed in this manner.

Preferably, each of the pixel switching TFTs 30 has the LDD structure,as described above. However, each of the TFTs 30 may have an offsetstructure in which implantation of impurities into the low concentrationsource region 1 b and the low concentration region 1 c is not performed.Alternatively, the TFTs 30 may be of the self-alignment type in whichthe implantation of the impurities of high concentrations thereinto isperformed by using the gate electrode, namely, a part of the scanningline 3 a as a mask and the high concentration source and drain regionsare formed in-a self-alignment manner.

Further, this embodiment employs a single gate structure in which onlyone gate electrode, namely, a part of the scanning line 3 a is placedbetween the high concentration source region 1 d and the highconcentration drain region 1 e. However, two or more gate electrodes maybe provided therebetween. At that time, the same signal is applied toeach of the gate electrodes. Thus, when the TFTs are constructed byemploying a dual gate structure, or a structure having triple or moregate electrodes, an occurrence of a leakage current in a junctionportion among the channel and the source-drain regions can be prevented.A current flowing when turned off can be reduced. If at least one of thegate electrodes has the LDD structure or the offset structure, anoff-current can be decreased still more. Consequently, a stableswitching device can be obtained.

As shown in FIGS. 2 and 3, in the liquid crystal device of thisembodiment, the data lines 6 a and the scanning lines 3 b are formed onthe TFT array substrate 10 in such a manner as to three-dimensionallyintersect with one another through the second interlayer insulating film4. Further, the barrier layer 80 is interposed between the semiconductorlayer 1 a and each of the pixel electrodes 9 a, and electricallyconnects the high concentration drain region le and the pixel electrode9 a through the first contact hole 8 a and the second contact hole 8 b.

Thus, as compared with the case of forming one contact hole guided tothe drain region of the semiconductor layer 1 a from the pixel electrode9 a, the diameters of the first contact hole 8 a and the second contacthole 8 b can be decreased. That is, when one contact hole is formed, ifthe selection ratio at the time of etching is low, the deeper the depthof the contact hole, the more the etching accuracy is deteriorated.Thus, to prevent the contact hole from penetrating a very thinsemiconductor layer 1 a, which is, for example, 50 nm or so inthickness, the process of forming the hole has to be adapted so that adry etching operation by which the diameter of the hole can be decreasedis stopped halfway, and that finally, a wet etching operation isperformed until the hole reaches the semiconductor layer 1 a.Alternatively, there is created the necessity for providing anadditional polysilicon film for preventing the contact hole frompenetrating the semiconductor layer by dry etching.

In contrast, in the case of this embodiment, it is sufficient to connectthe pixel electrode 9 a and the high concentration drain region 1 e ofthe semiconductor layer by the two series-connected first and secondcontact holes 8 a and 8 b. Thus, the first contact hole 8 a and thesecond contact hole 8 b can be formed by dry etching. Alternatively, atleast, the length of a part dug by wet etching of each of these holescan be decreased. Incidentally, to slightly taper the first contact hole8 a and the second contact hole 8 b, the wet etching may be performedfor a relatively short time after the dry etching.

As described above, according to this embodiment, the diameter of eachof the first contact hole 8 a and the second contact hole 8 b can bereduced to a small value. Thus, dents and uneven portions formed in thesurface portion of the barrier layer 80 are small in the first contacthole 8 a This expedites the flattening or leveling of the pixelelectrode portions 9 a placed thereabove. Moreover, the dents and unevenportions formed in the surface portions of the pixel electrodes 9 a aresmall in the second contact hole 8 b. This expedites the flattening orleveling of the pixel electrode portions 9 a As a result, this reducesdisclination in the liquid crystal layer 50, owing to the dents anduneven portions formed in the surface parts of the pixel electrodes 9 aFinally, this liquid crystal device can realize a high-picture-qualityimage display. The diameter of the second contact hole 8 b which moredirectly affects the dents and the uneven portions on the surfaces ofthe aforementioned pixel electrodes 9 a, can be reduced to a very smallvalue by limiting the total thickness of the second interlayerinsulating film 4 and the third interlayer insulating film 7 interposedbetween the barrier layer 80 and each of the pixel electrodes 9 a insuch a manner so as to be several hundreds nm or so

Incidentally, in the case of this embodiment, the barrier layer 80 isconstituted by a high-melting-point metallic film or an alloy filmthereof. Thus, when the etching is performed, the selection ratiosrespectively corresponding to the metallic film and the interlayerinsulating film largely differ from each other. Consequently, there isalmost no possibility that the hole penetrates the barrier layer 80 byperforming dry etching, as described above.

In the case of this embodiment, the first dielectric film 2 and thesecond dielectric film 81 of the storage capacitor 70three-dimensionally constructed around the barrier layer 80 aredielectric layers provided in a layer that is different from the layercorresponding to the second interlayer insulating film 4 interposedbetween the data lines 6 a and the scanning lines 3 b, whichthree-dimensionally intersect with one another. Therefore, to suppressthe parasitic capacitance between the data lines 6 a and the scanninglines 3 a causing a drop in the voltage level of the image signal, whichresults in flicker or the like, the barrier layer 80 is provided througha layer different from the second interlayer insulating film 4. Thus,the storage capacitance is imparted to the device. Consequently, in thecase of this embodiment, the thickness of each of these first dielectricfilm 2 and the second dielectric film 81 can be reduced to a technicallimit. As a result, especially, in the second storage capacitor 70 b,the capacitance value, which is inversely proportional to the thicknessof the second dielectric film 81, can be extremely efficientlyincreased. Especially, if a film is formed in such a manner as to be toothin, similarly as the insulating thin film 2 of the pixel switching TFT30, no peculiar phenomena, such as a tunnel effect, occur. Therefore, inthe condition that no defects such as a film breakage are produced, thesecond storage capacitor 70 a having very large capacitance can beformed within a relatively small region by forming a film having athickness of about 200 nm or an extremely thin film having a thicknessranging between 10 nm and 50 nm, which is less than the thickness of theinsulating thin film 2. Thus, an occurrence of a flicker can beprevented. Moreover, the ability to hold a voltage can be enhanced.Consequently, a high-contrast electro-optical device can be provided.

According to experiments and studies conducted by the inventors of thepresent invention, assuming that, in the aforementioned prior artdevice, in which the barrier layer is constituted by the same conductivelayer as the layer constituting the data lines 6 a, this barrier layeris used as one of the storage capacitor electrodes, and the interlayerinsulating film between the data line 6 a and the scanning line 3 a isused as the dielectric film, the dielectric film (corresponding to thesecond interlayer insulating film of this embodiment) is required tohave a thickness of about 800 nm so as to prevent the parasiticcapacitance between the data line 6 a and the scanning line 3 a fromcausing trouble. Thus, the present invention is very advantageous inthat this embodiment realizes the second storage capacitor 70 b, havinga storage capacitance value of several times to several tens of times ormore than that of the storage capacitance value of the storage capacitorof the prior art device, with respect to the same area.

Incidentally, if another laminated barrier layer or other plurallaminated layers are formed between the barrier layer 80 and the pixelelectrode 9 a through the interlayer insulating film, the storagecapacitance can be three-dimensionally increased by utilizing a limitedregion on the TFT array substrate 10.

The second dielectric film 81 constituting the second storage capacitor70 b in this manner may be a silicon oxide film, a silicon nitride film,or a multi-layer film obtained by stacking such films. Further, thesecond dielectric film 81 may be formed by various kinds of knowntechniques (for instance, a low-pressure CVD method, anatmospheric-pressure CVD method, a plasma CVD method, a thermaloxidation method, a sputtering method, an ECR plasma CVD method, and aremote plasma enhanced CVD method) to be usually used for forming theinsulating thin film 2. Additionally, in the case that the barrier layer80 and the second dielectric film 81 are formed by attaching importanceto the light shielding function of the barrier layer 80, which isconstituted by a light shielding film, and the layout of the firstcontact hole 8 a and the second contact hole 8 b in place of or inaddition to the storage capacitance adding function of the barrier layer80 in such a way as to reach the scanning lines 3 a, it is preferable toform the second dielectric film 81 in such a manner as to be thick tothe extent that the parasitic capacitance between the barrier layer 80and the scanning line 3 a is negligible.

On the other hand, it is preferable that the thickness of the barrierlayer 80 is, for example, 50 nm to 500 nm or so. If the thickness of thebarrier layer 80 is 50 nm or so, the possibility of penetration of thesecond contact hole 8 b through the barrier layer 80 in themanufacturing process is low. Further, if the thickness of the layer 80is 500 nm or so, the unevenness of the surfaces of the pixel electrodes9 a is negligible, or the surfaces thereof can be relatively easilyflatten.

Furthermore, in the case of this embodiment, the diameter of the firstcontact hole 8 a can be reduced still more, as a result of forming thefirst interlayer insulating film (namely, the second dielectric film)81. The dents and uneven portions of the barrier layer 80 in the firstcontact hole 8 a are smaller. The flattening or leveling of the surfaceof the pixel electrode 9 a disposed thereabove is expedited still more.Thus, the disclination of the liquid crystal due to the dents and unevenportions in the pixel electrode 9 a is reduced. Finally, an imagedisplay of higher picture quality is realized.

Incidentally, even in the case of the configuration of the liquidcrystal device of this embodiment, the second interlayer insulating film4 interposed between the scanning line 3 b and the data line 6 a isrequired to have a thickness (for example, 800 nm or so), at which theparasitic capacitance between both these wires is negligible, similar tothat of the prior art device.

In this embodiment constituted as described above, especially, the firstlight shielding film 11 a formed in a stripe may be extended under thescanning line 3 a and electrically connected to an constant potentialsource or a large capacitance portion. With this constitution, a changein electric potential at the first light shielding film 11 a does notexert a negative influence on the pixel switching TFT 30 placed in sucha manner so as to face the film 11 a. In this case, constant potentialsources, such as a negative power supply and a positive power supply,for supplying electric power to peripheral circuits (for instance, ascanning-line driving circuit and a data-line driving circuit) adaptedto drive the liquid crystal device, a grounded power supply, and aconstant potential source for supplying electric power to the opposingelectrode 21 are cited as the constant potential source.

Further, the storage capacitor lines 3 b and the scanning lines 3 a areconstituted by the same polysilicon film. The first dielectric film 2 ofthe first storage capacitor 70 a and the insulating thin film 2 of thepixel switching TFTs 30 are constituted by the same high-temperatureoxide film. The first storage capacitor electrode 1 f and the channelregion 1 a′, the low concentration source region 1 b, the lowconcentration drain region 1 c, the high concentration source region 1d, and the high concentration drain region 1 e of each of the pixelswitching TFTs 30 are constituted by the same semiconductor layer 1 a.Thus, the laminated layer structure formed on the TFT array substrate 10can be simplified. Furthermore, in a method for manufacturing anelectro-optical device (to be described later), the storage capacitorlines 3 b and the scanning lines 3 a can be simultaneously formed at thesame thin film forming step. Thus, the first dielectric film of thestorage capacitor 70 a and the insulating thin film 2 can besimultaneously formed.

In this embodiment, especially, the barrier layer 80 is constituted byan electrically conductive light shielding film. Therefore, each of thepixel aperture regions can be at least partly defined by the barrierlayer 80. Further, the second light shielding film at the side of theopposing substrate 20 can be omitted by defining the pixel apertureportion with the barrier layer 80, or a combination of the wires havinga light shielding property, such as the data lines 6 a, and the filmshaving a light shielding property formed on the TFT array substrate 10.The configuration, in which the barrier layer 80 is provided as anincorporated light shielding film instead of providing the second lightshielding film 23 on the opposing substrate 20, is extremelyadvantageous in that the pixel aperture ratio is not lowered by thedeviation in position between TFT array substrate 10 and the opposingsubstrate 20 in the manufacturing process.

Incidentally, the second light shielding film 23 to be provided on theopposing substrate 20 may be formed for the purpose of preventing thetemperature of the liquid crystal device from rising mainly owing to theincident light, in such a manner so as to be small (or narrow) so thatthe film 23 does not define the pixel aperture region. In this case, therise in temperature can be more effectively prevented by forming thesecond light shielding film 23 from a material having a highreflectivity, such as an Al film. Thus, when the second light shieldingfilm 23 is formed in such a manner as to be smaller than the lightshielding region on the TFT array substrate, the area of the pixelaperture region can be prevented from decreasing owing to the positionaldeviation between the substrates occurring in the manufacturing process.

The barrier layer 80 to be constituted by the light shielding film isconstituted by a metallic simple substance, an alloy, or a metallicsilicide, which contains at least one of Ti, Cr, W, Ta, Mo, and Pb thatare transparent high-melting-point metals. With this constitution, thebarrier layer 80 can be prevented from being broken or melted by a hightemperature treatment to be performed after the barrier layer 80 isformed and treated.

Further, even when such a high-melting-point metal is in contact withthe ITO film constituting the pixel electrode 9 a, the difference inionization rate therebetween prevents the high-melting-point metal frommelting. Consequently, the favorable electric connection between thebarrier layer 80 and the pixel electrode 9 a is provided through thesecond contact hole 8 b.

Furthermore, in this embodiment, especially, when viewed as a plane inthe TFT array substrate 10, the barrier layer 80 constituted by thelight shielding film is formed so that the projection of this layer ontothe substrate extends between the adjoining data lines 6 a along thescanning lines 3 a and is in an island correspondingly to each of thepixel units, as illustrated in FIG. 2. With this configuration, thestress due to light shielding can be reduced. Moreover, part or all of aside, which extends along the scanning lines 3 a, of the pixel apertureregion can be defined by the barrier layer 80. Incidentally, in the casethat the influence of the parasitic capacitance between the scanningline 3 a and the barrier layer 80 cannot be neglected from the viewpointof the practical design of the circuit of the device, it is preferablethat the side which extends along the scanning lines 3 a of the pixelaperture region at the side, at which the storage capacitor lines 3 badjoin the pixel electrodes 9 a, is defined by the barrier layer 80without providing the barrier layer 80 on the scanning lines 3 a.Alternatively, in the case in which the influence of the parasiticcapacitance between the scanning line 3 a and the barrier layer 80 isnegligible from the viewpoint of the practical design of the circuit ofthe device, the barrier layer 80 may be formed at a place at which thislayer 80 faces the scanning lines 3 a across the second dielectric film81. With this configuration, a larger part of the side which extendsalong the scanning lines 3 a, of the pixel aperture region can bedefined by the barrier layer 80 having a light shielding property, whichcovers at least a part of both of the scanning lines 3 a and the storagecapacitor lines 3 b. In other words, if the device has thisconfiguration, it is preferable that the second dielectric film 81 isformed in such a manner as to be thick to the extent that the parasiticcapacitance between the scanning line 3 a and the barrier layer 80 isnegligible. Alternatively, it is preferable for suppressing thisparasitic capacitance to a low level that the barrier layer 80 coversonly areas which are necessary to define the pixel aperture region ofthe scanning lines 3 a.

Incidentally, it is sufficient that a side of the pixel aperture regionwhich extends along the scanning lines 3 a at the side (namely, at thelower side, as viewed in FIG. 2), at which the scanning lines 3 a adjointhe pixel electrodes 9 a is defined by the first light shielding film 11a and the second light shielding film 23. Moreover, it is sufficientthat the side of the pixel aperture region which extends along the datalines 6 a is defined by the data lines 6 a constituted by Al lines, orthe first light shielding film 11 a, or the second light shielding film23.

Furthermore, preferably, an end portion of the island-like barrier layer80 placed in the direction of the scanning lines 3 a slightly overlapswith an edge portion of the data line 6 a, in a planar view asillustrated in FIG. 2. This prevents an occurrence of a gaptherebetween, which transmits incident light. Thus, this embodiment canprevent an occurrence of a poor-quality display, such as light leakage,in this portion. Therefore, the pixel aperture portion can be defined bythe combination of the data lines 6 a, the barrier layer 80, and thefirst light shielding film 11 a, or the combination of films having alight shielding property, for example, the data lines 6 a, and thebarrier layer 80. In this case, there is no need for forming the secondlight shielding film 23 on the opposing substrate 20. Thus, the step offorming the second light shielding film 23 on the opposing substrate 20can be eliminated. Moreover, a decrease or variation in the pixelaperture ratio which would be caused by alignment deviation between theopposing substrate 20 and the TFT array substrate 10 can be prevented.Further, in the case of providing the second light shielding film 23 onthe opposing substrate 20, the second light shielding film 23 is formedto be large by taking into consideration the alignment deviation betweenthe TFT array substrate 10 and the opposing substrate 20. However,because the pixel aperture portion is defined by the data lines 6 a andthe films formed at the side of the TFT array substrate 10 having alight shielding property, such as the barrier layer 80, the pixelaperture portion is defined with good precision. The pixel apertureratio can be enhanced, as compared with that in the case of defining thepixel aperture portion by the second light shielding film 23.

As described above, in this embodiment, especially, the barrier layer 80is constituted by the conductive light shielding film so that variousadvantages are obtained. The barrier layer 80 may be constituted by aconductive polysilicon film doped with phosphorus, instead of thehigh-melting-point metal film. With this constitution, the barrier layer80 does not serve as the light shielding film, but can fully perform thefunctions of increasing the storage capacitor 70 and the essentialrelaying function thereof. Moreover, stress hardly occurs between thebarrier layer 80 and the second interlayer insulating film 4. Thus, thisis serviceable to prevent the generation of cracks in and around thebarrier layer 80. On the other hand, it is sufficient to shield light byusing the first light shielding film 11 a and the second light shieldingfilm 23 separately from this so as to define the pixel aperture region.

Further, in this embodiment, all or part of the pixel aperture regionmay be defined by the first light shielding film 11 a formed under theTFTs 30. The side of the pixel aperture region which extends along thescanning lines 3 a can be defined by the first light shielding film 11 aand the barrier layer 80 by arranging the first light shielding film 11a so that the first light shielding film 11 a lies at the side of orslightly overlaps with the barrier layer 80 on a planar view, as viewedin FIG. 2.

In this embodiment, especially, the first contact hole 8 a and thesecond contact hole 8 b are opened at different positions on a plane onthe TFT array substrate 10, as illustrated in FIGS. 2 and 3. This canprevent an increase in unevenness at a position at which uneven portionsoverlap one another, which would occur in the case that the firstcontact hole 8 a and the second contact hole 8 b were formed at the sameposition on the plane. Consequently, it is expected that favorableelectric connection between the barrier layer and the electrode isprovided.

Incidentally, the shapes of the projections of the contact holes 8 a, 8b, and 5 on a plane may be circles, rectangles, or other kinds ofpolygons. Especially, the contact holes, whose projections on the planeare circular can serve to prevent occurrences of cracks in theinterlayer insulating film therearound. Further, it is preferable thatthese contact holes are slightly tapered by performing wet etching afterdry etching is performed.

(Manufacturing Process in First Embodiment of Electro-optical Device)

Next, the process of manufacturing a liquid crystal device, which is theembodiment having the aforementioned configuration, will be describedwith reference to FIGS. 4 to 7. Incidentally, FIGS. 4 to 7 are processdiagrams illustrating the layers at the steps of the manufacturingprocess at the side of the TFT array substrate in a section taken online A-A′ of FIG. 2, similar to FIG. 3.

First, in step (1) of FIG. 4, the TFT array substrate 10, such as aquartz substrate, a hard glass substrate, or a silicon substrate, isprepared. Incidentally, preferably, a heat treatment is performed onthis substrate at a high temperature of about 900 to 1300° C. in aninactive gas atmosphere containing an inactive gas, such as N₂(nitrogen). Thus, a pretreatment is performed thereon so as to reducedistortion occurring in the TFT array substrate 10 in a high-temperatureprocess to be performed later. That is, a heat treatment ispreliminarily performed on the TFT array substrate 10 at a temperatureadjusted to the temperature at which the high-temperature treatment isperformed at the highest temperature in the manufacturing process, or ahigher temperature. Further, a light shielding film 11, which isconstituted by a metallic alloy film containing metals, such as Ti, Cr,W, Ta, Mo and Pb, and a metallic suicide and which has a thickness ofabout 100 to 500 nm, preferably, about 200 nm, is formed on the entiresurface of the TFT array substrate 10 treated in this manner bysputtering. Incidentally, an antireflective coating, such as apolysilicon film, may be formed on the light shielding film 11 so as toalleviate surface reflection.

Next, as illustrated in step (2), a resist mask corresponding to apattern (see FIG. 2) of the first light shielding film 11 a is formed onthe formed light shielding film 11 in a lithographic step. Then, thefirst light shielding film 11 a is formed by performing etching on thelight shielding film 11 through the resist mask.

Next, as illustrated in step (3), a underlying insulating film 12constituted by a silicate glass film, such as NSG, PSG, BSG, or BPSG, asilicon nitride film, or a silicon oxide film is formed on the firstlight shielding film 11 a by using a TEOS (tetraethylorthosilicate) gas,TEB (tetraethylborate) gas, or TMOP (tetramethyloxyphosrate) gasaccording to an atmospheric-pressure CVD method or a low pressure CVDmethod. The thickness of this underlying insulating film 12 is set insuch a way as to range from about 500 to 2000 nm. Incidentally, there isno need for forming the first light shielding film 11 a in the case thatthe influence of return light coming from the rear surface of the TFTarray substrate 10 is negligible.

Next, as illustrated in step (4), an amorphous silicon film is formed onthe underlying insulating film 12 by performing a low pressure CVD (at apressure of about 20 to 40 Pa) using monosilane or disilane gas whoseflow rate is about 400 to 600 cc/min in a relatively low temperatureenvironment at a temperature within a range of about 450 to 550° C.,preferably, at a temperature of 500° C. Thereafter, a heat treatment isperformed on thereon in nitrogen atmosphere at a temperature within arange of about 600 to 700° C. for a time of about 1 to 10 hours,preferably, 4 to 6 hours, so that a polysilicon film 1 perform solidphase growth until the thickness thereof reaches a value within a rangeof about 50 to 200 nm, preferably, about 100 nm. A method for causingthe solid phase growth of the film may be a heat treatment using RTA(Rapid Thermal Anneal), or by a laser heat treatment using an excimerlaser.

In the case that n-channel type pixel switching TFTs 30 are formed asthe pixel switching TFTs 30 shown in FIG. 3 at that time, the channelregion may be slightly doped with impurities of a V group, such as Sb(antimony), As (arsenic), and P (phosphorus) by ion implantation.Further, in the case that p-channel type pixel switching TFTs 30 areformed as the pixel switching TFTs 30 shown in FIG. 3 at that time, thechannel region may be slightly doped with impurities of a III group,such as B (boron), Ga (gallium), and In (indium) by ion implantation.Incidentally, the polysilicon film 1 may be directly formed by a lowpressure CVD method, without performing a step of forming an amorphoussilicon film. Alternatively, the polysilicon film 1 may be formed byforming an amorphous film once by implanting silicon ions into thepolysilicon film deposited by the low pressure CVD method, andsubsequently performing recrystallization of the amorphous film by aheat treatment.

Next, as illustrated in step (5), the semiconductor layer 1 a having apredetermined pattern shown in FIG. 2 is formed by the photolithographicstep, the etching step, and so forth.

Next, as illustrated in step (6), a relatively thin heat-oxidizedsilicon film 2 a having a thickness of about 30 nm is formed byperforming a thermal oxidation on the semiconductor layer 1 a at atemperature within a range of about 900 to 1300° C., preferably, at atemperature of about 1000° C. Furthermore, as illustrated in step (7),an insulating film 2 b constituted by a high-temperature oxidationsilicon film (HTO film) or a silicon nitride film is deposited by a lowpressure CVD method in such a way as to have a thickness of about 50 nm.Then, the first dielectric film 2 for forming a storage capacitor isformed simultaneously with the insulating thin films 2 of the pixelswitching TFTs 30 having a multi-layer structure that contains theheat-oxidized silicon film 2 a and the insulating film 2 b. As a result,the thickness of the semiconductor layer 1 a becomes about 30 to 150 nm,preferably, about 35 to 50 nm. Further, the thickness of the insulatingthin film (namely, the first dielectric film) 2 becomes about 20 to 150nm, preferably, about 30 to 100 nm. Thus, an occurrence of a warpage dueto heat in the case of using a large-size 8-inch substrate can beprevented by decreasing a high-temperature oxidation time. Incidentally,the insulating thin film 2 having a single layer structure may be formedonly by performing thermal oxidation on the polysilicon film 1.

Next, as illustrated in step (8), after a resist layer 500 is formed ona part of the semiconductor layer 1 a other than a part to be formed asthe first storage capacitor electrode 1 f, by a photolithographic stepor an etching step, the resistance of the first storage capacitorelectrode 1 f may be reduced to a low value by being doped with P-ionswith a dose amount of about 3×10¹²/cm².

Next, as illustrated in step (9), after the resist layer 500 is removedtherefrom, a polysilicon film 3 is deposited by a low pressure CVDmethod. Moreover, P-ions undergo a thermal diffusion. Thus, thepolysilicon film 3 is made to be conductive. Alternatively, adoped-polysilicon film, into which P-ions are introduced simultaneouslywith the formation of the polysilicon film 3, may be used. Thepolysilicon film 3 is deposited in such a way so as to have a thicknessof about 100 to 500 nm, preferably, about 300 nm.

Next, as illustrated in step (10) of FIG. 5, the storage capacitor lines3 b together with the scanning lines 3 a having the predeterminedpattern of FIG. 2 are formed by performing a photolithographic stepusing the resist mask or an etching step. The scanning lines 3 a and thestorage capacitor lines 3 b may be formed from a high-melting-pointmetal or a metallic alloy film, such as a metallic silicide.Alternatively, a multi-layer wire combined with a polysilicon film maybe used.

Next, as illustrated in step (11), in the case that an n-channel typeTFT having the LDD structure is used as each of the pixel switching TFTs30 as shown in FIG. 3, the semiconductor layer 1 a is doped withimpurities of a V group, such as P, at a low concentration (for example,doped with P-ions with a dose amount of about 3×10¹²/cm²) by using agate electrode which is a part of the scanning line 3 a as a mask, so asto first form the low concentration source region 1 b and the lowconcentration drain region 1 c in the semiconductor layer 1 a.Consequently, a part of the semiconductor layer 1 a which lies under thescanning lines 3 a serves as a channel region 1 a′.

Next, as illustrated in step (12), the resist layer 600 is formed on thescanning lines 3 a by using a mask whose width is wider than that of thescanning line 3 a, so as to form the high concentration source region Idand the high concentration drain region 1 e of each of the pixelswitching TFTs 30. Thereafter, this layer is doped with impurities,namely, elements of the V group, such as P, at a high concentration(that is, for example, doped with P-ions with a dose amount of about3×10¹⁵/cm²). Further, in the case that a p-channel type TFT is used aseach of the pixel switching TFTs 30, the semiconductor layer 1 a isdoped with impurities, namely, elements of a III group, such as B, so asto form the low concentration source region 1 b, the low concentrationdrain region 1 c, the high concentration source region 1 d, and the highconcentration drain region 1 e. Incidentally, for instance, a TFT havingthe offset structure may be used without doping the layer withimpurities of a low concentration. Alternatively, a self-alignment typeTFT may be used by utilizing the ion implantation techniques which useP-ions and B-ions, and employing the scanning lines 3 a as a mask. As aresult of being doped with such impurities, the resistance of thestorage capacitor lines 3 b and the scanning lines 3 a is reduced to afurther lower value.

Incidentally, simultaneously with the step of forming elements of eachof the TFTs 30, the peripheral circuits, such as the data line drivingcircuit, and the scanning line driving circuit, which have acomplementary structure consisting of the n-channel type TFTs and thep-channel type TFTs, may be formed on the peripheral portion of the TFTarray substrate 10. Thus, in this embodiment, the peripheral circuitscan be formed nearly at the same step when the pixel switching TFTs 30are formed, by forming the semiconductor layer 1 a a of each of thepixel switching TFTs 30 from the polysilicon film. This is advantageousfor manufacturing of the device.

Next, as illustrated in step (13), after the resist layer 600 is removedtherefrom, the first interlayer insulating film 81 constituted by ahigh-temperature oxidation silicon film (namely, a HTO film) or asilicon nitride film is deposited on the storage capacitor lines 3 b,the scanning lines 3 a, and the insulating thin film (namely, the firstdielectric film) 2 by a low pressure CVD method or a plasma CVD method,in such a manner so as to have a relatively small thickness of 10 nm to200 nm. Incidentally, as described above, the first interlayerinsulating film 81 may be constituted by a multi-layer film. The firstinterlayer insulating film 81 can be formed by various kinds ofgenerally known techniques used for forming TFT insulating thin films.In the case of the first interlayer insulating films 81, even if thethickness thereof is too small, the parasitic capacitance between thedata lines 6 a and the scanning lines 3 a which would become too largein the case of forming the second interlayer insulating film 4 in such away so as to have a too small thickness, does not become too large.Moreover, peculiar phenomena, such as a tunnel effect, which would occurin the case of forming the insulating thin film 2 on the TFT 30 in sucha manner as to have a too small thickness, does not occur. Furthermore,the first interlayer insulating film 81 serves as the second dielectricfilm between the second storage capacitor electrode, which is a part ofthe storage capacitor line, and the barrier layer 80. Further, thethinner the second dielectric film 81, the larger the second capacitor70 b. Eventually, on condition that no film breakage occurs, theadvantageous effects of this embodiment are enhanced by forming theinsulating thin film 2 in such a way as to be an extremely thininsulating film having a thickness which is not more than 50 nm.

Next, as illustrated in step (14), a contact hole 8 a for electricallyconnecting the barrier layer 80 to the high concentration drain region 1e is formed by dry etching, such as reactive ion etching, or reactiveion beam etching. Such dry etching is high in directivity, so that thecontact hole 8 a can be formed in such a manner as to have a smalldiameter. Alternatively, wet etching, which is advantageous in that thepenetration of the contact hole 8 a through the semiconductor layer 1 ais prevented, may be also employed. This wet etching technique iseffective from the viewpoint of tapering the contact hole 8 a so as toprovide more favorable electrical connection therebetween.

Next, as illustrated in step (15), a metallic film containing Ti, Cr, W,Ta, Mo, and Pb, or a metallic alloy film such as a metallic silicide, isdeposited on the first interlayer insulating film 81 and the entiresurface of a part, which is exposed through the contact hole 8 a, of thesurface of the high concentration drain region 1 e by sputtering. Thus,a conductive film 80′ having a thickness of 50 to 500 nm or so isformed. If the film 80′ has a thickness of 50 nm or so, there is almostno possibility that the film 80′ is penetrated at the time of formingthe second contact hole 8 b later. Incidentally, antireflective coating,such as a polysilicon film, for alleviating the surface reflection maybe formed on this conductive film 80′. Further, the conductive film 80′may be constituted by a doped polysilicon film so as to lower thestress. At that time, the conductive layer 80′ may be formed as alaminated layer in such a manner so as to have two or more layers thatincludes a lower layer constituted by a doped polysilicon film (namely,a conductive polysilicon layer) and an upper layer constituted by ametallic film. Furthermore, the film 80′ may be formed in such a way soas to have three layers by putting a metallic film between the samepolysilicon films. The contact resistance can be considerably reduced byforming the conductive film 80′ and the high concentration drain region1 e from the same polysilicon film when the conductive film 80′ iselectrically connected to the region 1 e.

Next, as illustrated in step (16) in FIG. 6, the barrier layer 80containing third storage capacitor electrode is formed by forming aresist mask corresponding to the pattern (see FIG. 2) of the barrierlayer 80 by a photolithographic technique, and then performing etchingon the conductive film 80′ through the resist mask.

Next, as illustrated in step (17), the second interlayer insulating film4 comprising a silicate glass film, such as NSG, PSG, BSG, or BPSG film,or a silicon nitride film, or a silicon oxide film is formed by, forexample, an atmospheric-pressure CVD method, or a low pressure CVDmethod, and using a TEOS gas in such a manner as to cover the firstinterlayer insulating film 81 and the barrier layer 80. The thickness ofthe second interlayer insulating film 4 is, preferably, 500 to 1500 nm.If the thickness of the second interlayer insulating film 4 is not lessthan 500 nm, the influence of the parasitic capacitance between the datalines 6 a and the scanning lines 3 a is almost or entirely negligible.

Next, as illustrated in step (18), a heat treatment is performed at atemperature of about 1000° C. for 20 minutes or so, in order to activatethe high concentration source region 1 d and the high concentrationdrain region 1 e. Thereafter, a contact hole 5 is opened for the dataline 6 a Further, contact holes for connecting wires (not shown) to thescanning lines 3 a and the storage capacitor lines 3 b in the peripheralregion of the TFT array substrate 10 can be formed in the secondinterlayer insulating film 4 at the same process as that for forming thecontact hole 5.

Next, as illustrated in step (19), low resistance metal, such as Al, anda metallic silicide, which have a light shielding property, is depositedas a metallic film 6 on the second interlayer insulating film 4 in sucha manner as to have a thickness of about 100 to 500 nm, preferably,about 300 nm.

Next, as illustrated in step (20), the data lines 6 a are formed byperforming a photolithographic step or an etching step.

Next, as illustrated in step (21), a third interlayer insulating film 7constituted by a silicate glass film such as NSG, PSG, BSG or BPSG film,a silicon nitride film, or a silicon oxide film is formed by utilizingan atmospheric-pressure CVD method, or a low pressure CVD method, and aTEOS gas so as to cover the data line 6 a. The thickness of the thirdinterlayer insulating film 7 is, preferably, about 500 to 1500 nm.

Next, as illustrated in step (22), a contact hole 8 b for electricallyconnecting the pixel electrode 9 a to the barrier layer 80 is formed bydry etching, such as reactive ion etching, or reactive ion beam etching.Further, wet etching may be used so as to taper the contact hole.

Next, as illustrated in step (23), a transparent conductive thin film 9,such as an ITO film, is deposited on the third interlayer insulatingfilm 7 in such a manner as to have a thickness of about 50 to 200 nm bysputtering or the like. Furthermore, as illustrated in step (24), thepixel electrodes 9 a are formed by performing a photolithographic stepor an etching step. Incidentally, in the case of using the liquidcrystal device in a reflection type liquid crystal device, the pixelelectrodes 9 a may be formed from an opaque material, such as Al, whichhas a high reflectivity.

Subsequently, a coating liquid for forming a polyimide alignment film isapplied onto the pixel electrodes 9 a. Thereafter, an alignment film 16(see FIG. 3) is formed by performing rubbing treatment in apredetermined direction in such a manner as to have a predeterminedpretilt angle.

On the other hand, in the case of the opposing substrate 20 shown inFIG. 3, first, a glass substrate is prepared. Then, the second lightshielding film 23 and the third light shielding film, which serves as apicture-frame, are formed through a photolithographic step and anetching step after, for example, metallic chrome is sputtered.Incidentally, the second and third light shielding films may be formedfrom metallic materials, such as Cr, N, Al, or materials, such as aresin black, obtained by dispersing carbon or Ti in a photo resist.Incidentally, the second light shielding film 23 and third lightshielding film on the opposing substrate 20 can be omitted by defining alight shielding region by the data lines 6 a, the barrier layer 80, andthe first light shielding film 11 a on the TFT array substrate 10.

Thereafter, the opposing electrode 21 is formed by depositing atransparent conductive thin film, such as ITO film, on the entiresurface of the opposing substrate 20 in such a manner so as to have athickness of about 50 to 200 nm by spattering or the like. Furthermore,after the coating liquid for polyimide alignment films are applied ontothe entire surface of the opposing electrode 21, the alignment film 22(see FIG. 3) is formed by performing rubbing treatment in apredetermined direction in such a manner as to have a predeterminedpretilt angle.

Finally, the TFT array substrate 10 and the opposing substrate 20, oneach of which the aforementioned layers are formed, are bonded by usinga seal material (to be described later) so that the alignment films 16and 22 face each other. Then, the liquid crystals obtained by mixing aplurality of kinds of nematic liquid crystals are sucked into a spacebetween these substrates by vacuum suction. Thus, the liquid crystallayer 50 having a predetermined thickness is formed.

(Second Embodiment of Electro-optical Device)

The configuration of a liquid crystal device, which is a secondembodiment of an electro-optical device of the present invention, willbe described by referring to FIGS. 8 and 9. FIG. 8 is a plan diagramillustrating the plurality of adjacent pixels arranged on a TFT arraysubstrate, on which data lines, scanning lines, pixel. electrodes, and alight shielding film are formed in this liquid crystal device. FIG. 9 isa sectional view taken on line IX-IX′ of FIG. 8. Incidentally, theconstituent elements similar to those of the first embodiment, which areshown in FIGS. 2 and 3, are designated by like reference characters inthese figures, and the descriptions of such constituent elements areomitted herein. Further, in FIG. 9, a scale factor is allowed to varywith layers and members so that such layers and members are recognizablein this figure.

As shown in FIGS. 8 and 9, in the second embodiment, the first lightshielding film 11 b is provided in such a manner so as to cover thescanning lines 3 a, the storage capacitor lines 3 b, and the data lines6 a, when viewed from the side of the TFT array substrate 10,differently from the first embodiment, that is, provided on the entiretyof the grid-like non-aperture region surrounding each of the pixels.Furthermore, a contact hole 15 for electrically connecting the storagecapacitor line 3 b to the first light shielding film 11 b is provided onthe underlying insulating film 12. The storage capacitor line 3 b andthe first light shielding film 11 b are connected to a constantpotential wire in the peripheral area of the substrate. The remainingconstituent elements of the second embodiment are similar to thecorresponding constituent elements of the first embodiment.

Therefore, according to the second embodiment, the first light shieldingfilm 11 b has not only the functions of defining the pixel apertureregions, and serving as the constant potential wire corresponding to thestorage capacitor line 3 b and the redundant wire, but also thecapabilities of lowering the resistance of the storage capacitor lineitself and improving the picture quality of a displayed image.Additionally, the electric potential of the storage capacitor line 3 bcan be made to be equal to that of the first light shielding film 11 b.Further, a negative influence of fluctuation in the level of theelectric potential of each of the storage capacitor line 3 b and thefirst light shielding film 11 b on image signals and the TFTs 30 can bereduced. Furthermore, the underlying insulating film 12 interposedbetween the first light shielding film 11b and the semiconductor layer 1a is formed as a dielectric film. Moreover, storage capacitance can beadded thereto.

Further, the storage capacitor line 3 b, which is formed in the samestep as that of forming the scanning lines 3 a, may be provided like anisland as a storage capacitor electrode which corresponds to each of thepixels, by using the first light shielding film 11 b as a storagecapacitor line. With this configuration, the pixel aperture ratio can beenhanced.

Incidentally, such a first light shielding film 11 b can be formed bychanging the pattern of the resist mask in step (2) of the manufacturingprocess of the first embodiment. Furthermore, the contact hole 15 may beformed by performing dry etching methods, such as a reactive ion etchingmethod or a reactive ion beam etching method, and a wet etching methodin a time period between steps (8) and (9) of the manufacturing processof the first embodiment.

(Third Embodiment of Electro-optical Device)

The configuration of a liquid crystal device, which is a thirdembodiment of an electro-optical device of the present invention, willbe described by referring to FIG. 10. FIG. 10 is a sectional view of thethird embodiment corresponding to the sectional view of the secondembodiment, which is taken on line IX-IX′ of FIG. 8. Incidentally, inthe third embodiment shown in FIG. 10, the constituent elements similarto those of the second embodiment, which are shown in FIG. 8, aredesignated by like reference characters in FIG. 8, and the descriptionsof such constituent elements are omitted herein. Further, in FIG. 10, ascale factor is allowed to vary with layers and members so that suchlayers and members are recognizable in this figure.

As shown in FIG. 10, in the case of the third embodiment, the thirdinterlayer insulating film 7′ is formed so that the top surface thereofis flat, different from the second embodiment. As a result, the pixelelectrodes 9 a and the alignment film 16, which employ the thirdinterlayer insulating film 7′ as an underlying film, are flattened. Therest of the constituent elements of the third embodiment are similar tothe corresponding constituent elements of the second embodiment.

Therefore, according to the third embodiment, the difference in heightbetween a region in which the scanning lines 3 a, the TFTs 30, and thestorage capacitor lines 3 b are formed in such a way so as to overlapwith the data lines 6 a, and each of the other regions is reduced. Thepixel electrodes 9 a are flattened in this way so that the possibilityof occurrences of disclination in the liquid crystal layer 50 can belowered according to the degree of flattening thereof. As a result,according to the third embodiment, a higher picture-quality imagedisplay is realized. Moreover, the pixel aperture region can beenlarged.

Incidentally, the flattening of such a third interlayer insulating film7′ may be performed by effecting a CMP (Chemical Mechanical Polishing)treatment, or a spin coating treatment, or a reflow method and utilizingorganic SOG (Spin On Glass), inorganic SOG, or a polyimide film in step(21) of the manufacturing process of the first embodiment. Even if thethickness of the third interlayer insulating film 7′ is large, as aresult of such flattening, the penetration of a hole therethrough doesnot occur because of the fact that the barrier layer 80 is constitutedby a film having a high selectivity.

(Fourth Embodiment of Electro-optical Device)

The configuration of a liquid crystal device, which is a fourthembodiment of an electro-optical device of the present invention, willbe described by referring to FIG. 11. FIG. 11 is a sectional view of thefourth embodiment corresponding to the sectional view of the secondembodiment, which is taken on line IX-IX ′ of FIG. 8. Incidentally, inthe fourth embodiment shown in FIG. 10, the constituent elements similarto those of the second embodiment, which are shown in FIG. 8, aredesignated by like reference characters in FIG. 8, and the descriptionsof such constituent elements are omitted herein. Further, in FIG. 11, ascale factor is allowed to vary with layers and members so that suchlayers and members are recognizable in this figure.

As shown in FIG. 11, in the case of the fourth embodiment, the TFT arraysubstrate 10′ is formed so that parts of the top surface thereof, whichrespectively face the data lines 6 a, the scanning lines 3 a, and thestorage capacitor lines 3 b, are dented like a concave depressions,different from the second embodiment. As a result, the pixel electrodes9 a and the alignment film 16, which are formed through such wires, andthe interlayer insulating film, are flattened. Other configurations arethe same as that of the second embodiment.

Therefore, according to the fourth embodiment, the difference in heightbetween a region in which the scanning lines 3 a, the TFTs 30, and thestorage capacitor lines 3 b are formed in such a way as to overlap withthe data lines 6 a, and each of the other regions is reduced. The pixelelectrodes 9 a are flattened only by filling up at least part of thenon-aperture region of each of the pixels in this way, so that thepossibility of occurrences of disclination in the liquid crystal layer50 can be lowered according to the degree of flattening thereof As aresult, according to the fourth embodiment, a higher picture-qualityimage display is realized. Moreover, the pixel aperture region can beenlarged.

Incidentally, for producing such a TFT array substrate 10′, it issufficient to perform etching on regions to be provided with concavedepressions, for example, before performing the treatment in step (1) ofthe manufacturing process of the first embodiment.

Although the top surface of the third interlayer insulating film isflattened in the third embodiment, and the pixel electrodes of thefourth embodiment are finally flattened by forming the wires andelements on the concave grooves formed in the substrate, as describedabove, similar effects of flattening can be obtained by denting thesecond interlayer insulating film 4 or the underlying insulating film 12with concave depressions. In this case, a method of forming each of theinterlayer insulating films with concave depressions is to form a thinfilm and etching so that each of the interlayer insulating films has adouble layer structure, and that thin portions each having only a singlelayer, which are used as the bottom portions of the concave depressions,and that thick portions each having two layers are used as bank portionsof the concave depressions. Alternatively, each of the interlayerinsulating films are made to have a single layer structure, and theconcave depressions are formed in such interlayer insulating films. Inthese cases, the application of dry etching methods, such as a reactiveion etching and a reactive ion beam etching, is advantageous in that theconcave depressions can be formed just as designed. On the other hand,in the case of using at least a wet etching method singly, or acombination of a wet etching method and a dry etching method, the sidewall surfaces of the concave depressions can be tapered. Thus, theresidual polysilicon films and resists formed on the side wall surfacesof the concave depressions in a post-process can be reduced.Consequently, this method is advantageous in that the yield of thedevice is not reduced.

(Fifth Embodiment of Electro-optical Device)

The configuration of a liquid crystal device, which is a fifthembodiment of an electro-optical device of the present invention, willbe described by referring to FIG. 12. FIG. 12 is a sectional view of thefifth embodiment corresponding to the sectional view of the firstembodiment, which is taken on line III′ of FIG. 2. Incidentally, in thefifth embodiment shown in FIG. 12, the constituent elements similar tothose of the first embodiment, which are shown in FIG. 12, aredesignated by like reference characters in FIG. 12, and the descriptionsof such constituent elements are omitted herein.

In the case of the fifth embodiment, the second contact hole 8 b forelectrically connecting the barrier layer 80 to the pixel electrode 9 ais formed above the storage capacitor lines 3 b. A portion having thearea, which lies under the second contact hole 8 b can serve as acapacitor, as a result of forming the second contact hole 8 b above thestorage capacitor lines 3 b. The capacitance of the device can beincreased for that.

(Whole Configuration of Electro-optical Device)

The whole configuration of the liquid crystal device, which is anexample of the electro-optical device having the aforementionedconstitution of each of the embodiments, will be described hereunder byreferring to FIGS. 13 and 14. Incidentally, FIG. 13 is a plan diagramillustrating the TFT array 10 and the constituent elements providedthereon, as viewed from the opposing substrate 20. FIG. 14 is asectional view taken on line H-H′ of FIG. 13.

As shown in FIG. 13, the seal member 52 is provided on the TFT arraysubstrate 10 along the edges thereof. A third light shielding film 53,which is made of the same material as or a material different from thematerial of the second light shielding film 23, and which serves as apicture-frame for defining the portion around the image display region,is provided in parallel with the inside surfaces of the seal member 52.In regions outside the seal member 52, a data line driving circuit 101for driving the data lines 6 a by supplying image signals thereto withpredetermined timing, and external circuit connection terminals 102 areprovided along one of the sides of the TFT array substrate 10. Moreover,a scanning line driving circuit 104 for driving the scanning lines 3 aby supplying scanning signals thereto with predetermined timing isprovided along other two 10 sides, which adjoin the side correspondingto the data line driving circuit 101, of the TFT array substrate 10.Needless to say, if a delay in the scanning signal to be supplied to thescanning lines 3 a is negligible, the device has only to be providedwith only one of the scanning line driving circuits 104. Further, dataline driving circuits 101 may be placed on and along both sides of theimage display regions. For instance, the odd-numbered data lines 6 a maybe supplied with image signals from the data line driving circuitdisposed along one of the sides of the image display region, while theeven-numbered data lines 6 a may be supplied with image signals from thedata line driving circuit disposed along the opposite side of the imagedisplay region. If the data lines 6 a alternately selected in thismanner are driven, the area of the data line driving circuit can beincreased. Thus, a complex circuit can be configured. Further, aplurality of wires 105 for connecting the scanning line driving circuits104 disposed on both sides of the image display region are provided onthe remaining one of the sides of the TFT array substrate 10.Furthermore, an electrically conducting member 106 for providingelectrical connection between the TFT array substrate 10 and theopposing substrate 20 is provided on at least one of the comer portionsof the opposing substrate 20. Furthermore, as illustrated in FIG. 14,the opposing substrate 20, which has almost the same outline as of thesealing member 52 shown in FIG. 13, is securely fixed to the TFT arraysubstrate 10 by using the sealing member 52. Incidentally, a samplingcircuit for applying image signals with predetermined timing to theplurality of data lines 6 a, a precharge circuit for supplying prechargesignals having predetermined signal levels to the plurality of datalines 6 a in such a way so as to precede the image signals, aninspection circuit for checking the quality and defects of the liquidcrystal device during manufactured or when shipped are provided on theTFT array substrate 10 in addition to the data line driving circuit 101and the scanning line driving circuit 104. Incidentally, according tothis example, it is sufficient to form the second light shielding film23 on the opposing substrate 20 in such a manner as to be smaller thanthe light shielding region of the TFT array substrate 10. Furthermore,the second light shielding film 23 can easily be removed therefromaccording to the use of the liquid crystal device.

In each of the embodiments illustrated by referring to FIGS. 1 to 14,the data lines and the scanning lines may be electrically andmechanically connected to driving LSIs mounted on a TAB (Tape AutomatedBonding) substrate through an anisotropic conductive film provided in aperipheral portion of the TFT array substrate 10, instead of providingthe data line driving circuit 101 and the scanning line driving circuits104 on the TFT array substrate 10. Further, a polarization film, aretardation film, and a polarizer are placed in directions predeterminedaccording to, for example, operation modes, such as a TN (TwistedNematic) mode, a VA (Vertically Aligned) mode, a PDLC mode (PolymerDisperse Liquid Crystal) mode, the normally white mode, and the normallyblack mode, at each of the side of the opposing substrate 20, upon whichprojection light is incident, and the side of the TFT array substrate10, from which output light is outputted.

The aforementioned embodiments of the electro-optical device is appliedto a color projector. Thus, the electro-optical devices are respectivelyused as light valves for R (red), G (green), and B (blue) light rays.Each of these color light rays obtained by letting emitted lighttraveling through a dichroic mirror for RGB color separation is impingedupon a corresponding one of these light valves as incident lighttherefor. Therefore, in each of the embodiments, no color filters areprovided on the opposing substrate 20. However, a RGB color filter and aprotecting film therefor may be formed in a predetermined region facingthe pixel electrodes 9 a on the opposing substrate 20, on which thesecond light shielding film 23 is not formed. Alternatively, a colorfilter layer can be formed by using a color resist under the pixelelectrode 9 a facing a corresponding one of the RGB light valves on theTFT array substrate 10. Thus, the embodiments of the electro-opticaldevice can be applied to color liquid crystal television sets of thedirect view type and those of the reflection type other than theprojectors. Furthermore, a microlens may be provided on the opposingsubstrate 20 corresponding to each of the pixels. Additionally, anelectro-optical device providing bright light is realized by improvingthe incident-light condensing efficiency thereof Besides, dichroicfilters for providing RGB color light rays by utilizing opticalinterference may be formed on the opposing substrate 20 by depositing anumber of interference layers differing in refractive index from oneanother. A color electro-optical device providing brighter light isrealized by such an opposing substrate provided with this dichroicfilter.

In the case of the aforementioned embodiments of the electro-opticaldevice, incident light is impinged from the side of the opposingsubstrate 20, similar to the case of the prior art device. However, eachof the embodiments has the first light shielding film 11 a. Thus, theelectro-optical device may be adapted so that incident light is impingedfrom the side of the TFT array substrate 10, and that output light isthereafter outputted from the side of the opposing substrate 20. Namely,even if the electro-optical devices are mounted on the liquid crystalprojector in this manner, light can be prevented from entering thechannel region 1 a′, the low concentration source region 1 b, and thelow concentration drain region 1 c of the semiconductor layer 1 a.Moreover, a high-picture quality image can be displayed. Incidentally,the prior art devices are required to have an additional polarizercoated with an AR (Anti-Reflection) coat for preventing reflection oflight, so as to prevent light from being reflected on the back surfaceof the TFT array substrate 10. Alternatively, the prior art device needto have an additional AR film adhering thereto. However, in each of theembodiments, the first light shielding film 11 a is formed between thesurface of the TFT array substrate 10 and at least one of the channelregion 1 a′, the low concentration source region 1 b, and the lowconcentration drain region 1 c of the semiconductor layer 1 a. Thiseliminates the necessity for using such an AR-coated polarizer or ARfilm, and for using the substrate obtained by performing anantireflection treatment on the TFT array substrate 10 itself

Therefore, according to the embodiments, the cost of the materials ofthe device can be reduced. Further, when the polarizer is attached tothe device, the yield thereof is not reduced by dusts and scratches.Thus, the embodiments of the electro-optical devices are veryadvantageous. Furthermore, the electro-optical devices of the presentinvention has good light resistance, so that deterioration in picturequality, such as a crosstalk, does not occur even when a light sourceproviding bright light is used, or even when the light utilizationefficiency thereof is improved by performing polarization conversion bymeans of a polarization beam splitter.

Further, in the foregoing description, it has been described that apolysilicon TFT of the positive stagger type or the coplanar type isused as the switching elements provided at each of the pixels. Each ofthe embodiments is effective in the case that TFTs of other types, suchas TFTs of the reverse stagger type and amorphous TFTs, are used as theswitching elements.

(Electronic Equipment)

Next, embodiments of electronic equipment having the electro-opticaldevice 100 as detailedly described above will be described hereunderwith reference to FIGS. 15 to 17.

Referring first to FIG. 15, there is schematically shown theconfiguration of the electronic equipment having the electro-opticaldevice 100.

As shown in FIG. 15, the electronic equipment has a display informationoutput source 1000, a display information processing circuit 1002, adriving circuit 1004, an electro-optical device 100, a clock generatingcircuit 1008, and a power supply circuit 1010. The display informationoutput source 1000 includes storage devices, such as a ROM (Read-OnlyMemory), a RAM (Random Access Memory), and an optical disk unit, and asynchronization circuit for synchronizing and outputting image signals.Further, the display information output source 1000 outputs displayinformation represented by image signals having a predetermined format,to a display information processing circuit 1002 according to clocksignals outputted from the clock generating circuit 1008. The displayinformation processing circuit 1002 includes various kinds of knownprocessing circuits, such as an amplification/polarity-reverse circuit,a serial-parallel conversion circuit, a rotation circuit, a gammacorrection circuit, and a clamping circuit. The display informationprocessing circuit 1002 serially generates digital signals, based oninput display information, which are inputted according to the clocksignals, and then outputs the digital signals together with the clocksignals CLK to the driving circuit 1004. The driving circuit 1004 isoperative to drive the electro-optical device 100. The power supplycircuit 1010 supplies electric power to each of the aforementionedcircuits. Incidentally, the driving circuit 1004 may be mounted on theTFT array substrate of the electro-optical device 100. Additionally, thedisplay information processing circuit 1002 may be also mounted thereon.

Referring next to FIGS. 16 and 17, there are shown practical examples ofthe electronic equipment constructed in this manner.

As shown in FIG. 16, in the case of a projector 1100 serving as anexample of the electronic equipment, three light valves including theelectro-optical device 100 having the driving circuit 1004 mounted onthe TFT array substrate are prepared. This projector is constructed sothat these light valves are used as a light valve for R light rays, alight valve for G light rays, and a light valve for B light rays,respectively. In the projector 1100, projection light emitted from alamp unit 1102, such as a metal halide lamp, serving as a white lightsource is separated by three mirrors 1106 and two dichroic mirrors 1108into light components R, G, and B respectively corresponding toprimaries RGB. These components R, G, and B are led into the lightvalves 100R, 100G, and 100B, respectively corresponding thereto. At thattime, especially, the blue light component B is led thereto through arelay lens system 1121 consisting of an incidence lens 1122, a relaylens 1123, and an output lens 1124, so as to prevent optical loss due toa long optical path. Then, projection light is synthesized again fromthe light components, which are respectively modulated by the lightvalves 100R, 100G, and 100B and correspond to the primaries.Subsequently, the projection light is projected through the projectionlens 1114 on a screen 1120 as a color image.

As shown in FIG. 17, a multi-media-capable laptop personal computer (PC)1200, which is another example of the electronic equipment, has theaforementioned electro-optical device 100 provided in a top cover case,and further contains a CPU, a memory, and a modem, and further a mainunit 1204 into which a keyboard 1202 is incorporated.

In addition to the examples of the electronic equipment described withreference to FIGS. 16 and 17, a liquid crystal television set, aviewfinder type or monitor-direct-view type video tape recorder, a carnavigation device, an electronic notepad, an electronic calculator, aword processor, an engineering work station (EWS), a hand-portabletelephone set, a POS terminal, and a device having a touch panel arecited as examples of the electronic equipment shown in FIG. 15.

As described above, according to this embodiment, various kinds ofelectronic equipment having the electro-optical device, which canprovide a high-picture-quality image and have high manufacturingefficiency, are realized.

INDUSTRIAL APPLICABILITY

As described above, according to the first electro-optical device of thepresent invention, the picture quality of a displayed image of theelectro-optical device can be improved, and the layout flexibility canbe increased, and the stability and reliability of the device can beenhanced, the facilitation of the manufacturing process can be achievedfrom various viewpoints by a conductive layer formed at a specificposition in a laminated layer structure.

According to the second electro-optical device of the present invention,the picture quality of a displayed image of the electro-optical devicecan be improved, and the layout flexibility can be increased, and thestability and reliability of the device can be enhanced, thefacilitation of the manufacturing process can be achieved from variousviewpoints by thin film transistors formed under the scanning lines, anda conductive layer formed beside the thin film transistor and at aspecific position in a laminated layer structure which contains storagecapacitors under storage capacitor lines.

According to the third electro-optical device of the present invention,storage capacitance can be easily and efficiently increased by utilizingthe second dielectric film, which can be made to be a thin filmindependent of the parasitic capacitance between the data lines and thescanning lines. Thus, flickers due to insufficiency of the storagecapacitance can be reduced. Moreover, the contrast ratio can beenhanced. Especially, when the accuracy of the device is increased to anextremely high level, and the size of the device is reduced to anextremely small value, sufficient storage capacitance is added to thedevice. Further, the electrical connection between the pixel electrodeand the drain region can be easily provided by the buffering function ofthe conductive layer. Moreover, the diameters of the contact holes canbe decreased. Furthermore, the diameters thereof can be reduced stillmore with a decrease in the thickness of the first or second dielectricfilm. Thus, the pixel aperture ratio can be improved owing to thepresence of the contact hole. Additionally, occurrences of disclinationin the electro-optical materials can be prevented. Further, the secondcontact hole can be formed at an arbitrary position on a plane in aregion, if a projection of the data lines on the plane and a projectionof the conductive layer on the plane are present in a projection of theregion on the plane. Thus, the flexibility of the position, at which thesecond contact hole is formed, is considerably enhanced. Consequently,the flexibility of designing the layout on the plane is exceedinglyincreased. The device of the present invention is very convenient forpractical use.

Further, according to the method for manufacturing the electro-opticaldevice of the present invention, the electro-optical device of thepresent invention can be manufactured by performing a relatively smallnumber of steps, in each of which a relatively simple operation isperformed.

What is claimed is:
 1. An electro-optical device including a substratewhich has a plurality of scanning lines, a plurality of data lines, thinfilm transistors disposed in correspondence with intersections of saidplurality of scanning lines and said plurality of data lines, pixelelectrodes disposed in correspondence with said thin film transistors,and storage capacitors disposed in correspondence with said pixelelectrodes, said electro-optical device comprising: a first interlayerinsulating film formed above an electrode corresponding to one of saidplurality of scanning lines and said plurality of storage capacitors; arelaying conductive layer formed above said first interlayer insulatingfilm; and a second interlayer insulating film formed above said relayingconductive layer, said plurality of data lines being formed on saidsecond interlayer insulating film.
 2. The electro-optical deviceaccording to claim 1, said substrate further comprising a thirdinterlayer insulating film formed on said data lines, said pixelelectrodes being formed on said third interlayer insulating film andbeing electrically connected to said relaying conductive layer throughcontact holes formed in said second interlayer insulating film and saidthird interlayer insulating film, and said relaying conductive layerbeing electrically connected to the semiconductor layer.
 3. Anelectro-optical device including a substrate, the substrate comprising:a plurality of scanning lines; a plurality of data lines; thin filmtransistors disposed in correspondence with said plurality of scanninglines and said plurality of data lines; pixel electrodes disposed incorrespondence with said thin film transistors; semiconductor layersconstituting of source regions, drain regions and first storagecapacitor electrodes of said thin film transistors; an insulating thinfilm formed on each of said semiconductor layers, a gate electrode ofeach of said thin film transistors being formed on said insulating thinfilm and being constituted by a part of the scanning lines; a secondstorage capacitor electrode formed on said insulating thin film; a firstinterlayer insulating film formed on said scanning lines and said secondstorage capacitor electrodes; a relaying conductive layer formed on saidfirst interlayer insulating film; and a second interlayer insulatingfilm formed on said relaying conductive layer, said data lines beingformed on the second interlayer insulating film and electricallyconnected to the source region of said semiconductor layer throughcontact holes formed in said first interlayer insulating film and saidsecond interlayer insulating film.
 4. The electro-optical deviceaccording to claim 3, said relaying conductive layer being electricallyconnected to the drain region of said semiconductor layer through thecontact holes formed in said first interlayer insulating film and saidinsulating thin film.
 5. The electro-optical device according to claim3, said substrate further comprising a third interlayer insulating filmformed on said data lines, said pixel electrodes being formed on saidthird interlayer insulating film and electrically connected to saidrelaying conductive layer through contact holes formed in said secondinterlayer insulating film and said third interlayer insulating film. 6.An electro-optical device comprising: a plurality of pixel electrodesand a plurality of thin film transistors arranged in a matrix on asubstrate; scanning lines and data lines disposed in correspondence withsaid thin film transistors and three-dimensionally intersecting with oneanother through interlayer insulating layers; a relaying conductivelayer interposed between a semiconductor layer of said thin filmtransistors and said pixel electrodes, the relaying conductive layerbeing electrically connected to a drain region of said semiconductorlayer through a first contact hole and electrically connected to saidpixel electrodes through a second contact hole; a first dielectric filminterposed between a first storage capacitor electrode constituted by asame film as a film of a semiconductor portion constituting said drainregion, and a second storage capacitor electrode disposed on said firststorage capacitor electrode; and a second dielectric film interposedbetween said second storage capacitor electrode and a third storagecapacitor electrode constituted by a part of said relaying conductivelayer.
 7. The electro-optical device according to claim 6, said firststorage capacitor and said second storage capacitor electrode at leastpartly overlapping with each other through said first dielectric film ina planar view, and said second storage capacitor electrode and saidthird storage capacitor electrode at least partly overlapping with eachother through said second dielectric film in a planar view.
 8. Theelectro-optical device according to claim 6, said first dielectric filmbeing constituted by a first insulating film which is formed on saidsemiconductor layer, said scanning lines and said second storagecapacitor electrode being constituted by a same film, and said seconddielectric film being constituted by a second insulating film which isformed on said scanning line.
 9. The electro-optical device according toclaim 1, said relaying conductive layer comprising a conductive lightshielding film.
 10. The electro-optical device according to claim 9,said relaying conductive layer comprising a projection on said substratethat extends between adjoining data lines along said scanning lines, andformed in an island correspondingly to each of said pixel electrodes.11. The electro-optical device according to claim 10, said adjoiningdata lines and said relaying conductive layer being formed so as to atleast partly overlap with each other.
 12. The electro-optical deviceaccording to claim 9, said relaying conductive layer and said scanninglines having shapes that at least partly overlap with each other in aplanar view.
 13. The electro-optical device according to claim 9, saidrelaying conductive layer comprising a high-melting-point metal.
 14. Theelectro-optical device according to claim 1, said relaying conductivelayer comprising a conductive polysilicon film.
 15. The electro-opticaldevice according to claim 1, said relaying conductive layer comprising alaminated layer film that comprises at least two layers of conductivepolysilicon film and high-melting-point metal.
 16. The electro-opticaldevice according to claim 1, said substrate further comprising a lightshielding film that covers a channel region of said semiconductor layerin a planar view.
 17. The electro-optical device according to claim 16,said light shielding film extending under said scanning lines and beingconnected to a constant potential source.
 18. The electro-optical deviceaccording to claim 16, said light shielding film being electricallyconnected to said second storage capacitor electrode through a contacthole formed in an underlying insulating film interposed between saidlight shielding film and said semiconductor layer.
 19. Theelectro-optical device according to claim 1, said second storagecapacitor electrode being extended and serving as a storage capacitorline.
 20. The electro-optical device according to claim 19, said storagecapacitor line being electrically connected to said light shielding filmthrough an underlying insulating film.
 21. The electro-optical deviceaccording to claim 1, said relaying conductive layer and said lightshielding film being disposed so that said relaying conductive layer andsaid light shielding film at least partly overlap with each other. 22.The electro-optical device according to claim 1, further comprising: anunderlying insulating film is provided between said substrate and saidthin film transistor; and a third interlayer insulating film provided onsaid data lines and under said pixel electrodes, at least one of saidsubstrate, said underlying insulating film, said second interlayerinsulating film, and said third interlayer insulating film being formedpartly dented in at least a part of said thin film transistor, scanninglines, data lines, and storage capacitors and each of said pixelelectrodes is formed in such a way as to be almost flat.
 23. Theelectro-optical device according to claim 6, said first contact hole andsaid second contact hole being formed at different places on a surfaceof said substrate.
 24. The electro-optical device according to claim 1,said relaying conductive layer having a thickness ranging from 50 nm to500 nm.
 25. The electro-optical device according to claim 3, said firstinterlayer insulating film having a thickness ranging from 10 nm to 200nm.
 26. The electro-optical device according to claim 6, said seconddielectric film having a thickness ranging from 10 nm to 200 nm.
 27. Theelectro-optical device according to claim 9, said relaying conductivelayer defining at least a part of a pixel aperture region.
 28. Anelectronic equipment comprising said electro-optical device recited inclaim
 1. 29. An electro-optical device including a substrate which has aplurality of scanning lines, a plurality of data lines, thin filmtransistors disposed in correspondence with intersections of saidplurality of scanning lines and said data lines, pixel electrodesdisposed in correspondence with said thin film transistors, and storagecapacitors disposed in correspondence with said pixel electrodes, saidelectro-optical device comprising: a first interlayer insulating filmformed above a gate electrode of said thin film transistors; and arelaying conductive layer formed above said first interlayer insulatingfilm, formed along a direction of said scanning line between adjacentdata lines, as one of storage capacitor electrodes, said plurality ofdata lines being formed above said said relaying conductive layerthrough an insulating film.